SPRADK8 February   2025 AM62P

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Hardware Used
    1. 2.1 AM62Px Processor
    2. 2.2 SK-LCD1
    3. 2.3 Display Subsystem on AM62P
  6. 3Early Splash-Screen Architecture
    1. 3.1 Boot Stages on AM62P
    2. 3.2 Flicker-Free Transition
  7. 4Flicker-Free Transition From SPL to U-Boot
    1. 4.1 Steps to Test
    2. 4.2 Measurements
  8. 5Flicker-Free Transition From SBL to Linux Kernel
    1. 5.1 Steps to Test
    2. 5.2 Measurements
  9. 6Results

Measurements

The time taken from POR to when the display comes up is noted to be approximately 180ms. The measurement was taken by using a GPIO pin, which by default is in active-low state. The pin is set high in CSL_dssVpSetGoBit() by using the gpio_set_high() API. OSPI NOR is used as boot-media for testing purposes.

  • The dss_display share example provided in the default MCU+ SDK is used for experimentation. Modifications to this example are made to implement the flicker-free transition demonstrated through SBL flow.
  • GPIO0_39 on the user expansion connector-pin 18, is used for time measurements. Figure 5-5 shows the options in SysConfig to enable this pin:
    AM62P SysConfig
                            Settings Figure 5-5 SysConfig Settings
  • Set the GPIO pin to high by defining the API in dss_display_share.c as follows :
    void gpio_set_high(void *args) { 
    	uint32_t gpioBaseAddr, pinNum;
    	DebugP_log("GPIO LED started ...\r\n");
    	
    	/* Get address after translation translate */ 
    	gpioBaseAddr = (uint32_t) AddrTranslateP_getLocalAddr(GPIO_LED_BASE_ADDR); pinNum = GPIO_LED_PIN;
    	GPIO_setDirMode(gpioBaseAddr, pinNum, GPIO_LED_DIR);
    	GPIO_pinWriteHigh(gpioBaseAddr, pinNum);
    	DebugP_log("GPIO LED HIGH!!\r\n");
    }
  • Use the API in CSL_dssVpSetGoBit() as follows:
    diff --git a/source/drivers/dss/v0/hw_include/V3/csl_dssVideoPort.c b/source/drivers/dss/v0/hw_include/V3/csl_dssVideoPort.c
    
    index f882d54..ee18b95 100755
    
    --- a/source/drivers/dss/v0/hw_include/V3/csl_dssVideoPort.c
    
    +++ b/source/drivers/dss/v0/hw_include/V3/csl_dssVideoPort.c
    
    @@ -183,6 +183,8 @@ void CSL_dssVpEnable(CSL_dss_vpRegs *vpRegs, uint32_t enable)
    
         CSL_REG32_WR(&vpRegs->CONTROL, regVal);
    
     }
    
    +extern void gpio_set_high(void *args);
    
    +
    
     void CSL_dssVpSetGoBit(CSL_dss_vpRegs *vpRegs)
    
     {
    
         uint32_t regVal;
    
    @@ -192,6 +194,7 @@ void CSL_dssVpSetGoBit(CSL_dss_vpRegs *vpRegs)
    
                  DSS_VP1_CONTROL_GOBIT,
    
                  CSL_DSS_VP1_CONTROL_GOBIT_VAL_UFPSR);
    
         CSL_REG32_WR(&vpRegs->CONTROL, regVal);
    
    +    gpio_set_high(NULL);
    
     }
    
     void CSL_dssVpSetLcdTdmConfig(CSL_dss_vpRegs *vpRegs,
  • When the GPIO0_39 pin is connected to the logic analyzer, the GPIO pin is set high at around 180ms.