SPRUIJ9C April 2018 – October 2025
The AM574x processor contains 3 reset inputs and an output indicating a reset is in progress. The reset pins are:
More details about the behavior of these reset pins within the AM574x processor can be found in the AM574x Sitara Processors Silicon Revision 1.0 Data Manual (SPRS982). There are push buttons on the IDK that can initiate either a RESETn or PORz input. SW1 can drive PORz active (low) and SW2 can drive RESETn active (low).
There is a device erratum in all of the AM574x devices that prevents use of RESETn independent from PORz. The workaround is to generate PORz whenever a device reset occurs even if it is from an internal initiator. This is accomplished through cooperation with the PMIC paired with the AM574x device on the IDK EVM. The RSTOUTn output from the AM574x device is connected to the NRESWARM input of the PMIC. This initiates a re-start that drives RESET_OUT low and resets all voltages to their initial values. Since RESET_OUT from the PMIC is connected to PORz in the AM574x device, a hard reset is forced on the SOC that meets the needs of the erratum workaround.
The AM574x IDK EVM is started by pressing the start-up push button, SW3. The POWERHOLD input can be connected to VRTC_OUT in customer designs to cause the board to power-on as soon as the main supply is stable.
The configuration of the PMIC to provide RESET_OUT from the NRESWARM input creates an always-on implementation. This always-on mode of operation prevents software shut-down of the IDK. Customer designs should have power-good monitoring circuitry such as a TPS3808 connected to the main supply to the PMIC that is connected to the PMIC RESET_IN. The TPS3808 can detect the main supply voltage dropping and then trigger the PMIC to execute a controlled shut-down that meets the requirements in the AM574x Sitara Processors Silicon Revision 1.0 Data Manual (SPRS982).