SPRUJ81 February   2023 AM62A3 , AM62A3-Q1 , AM62A7 , AM62A7-Q1

 

  1.   Trademarks
  2. 1 Introduction
  3. 2 Width/Spacing Proposal for Escapes
  4. 3 Stackup
  5. 4 Via Sharing
  6. 5 Floorplan Component Placement
  7. 6 Critical Interfaces Impact Placement
  8. 7 Routing Priority
  9. 8 SerDes Interfaces
  10. 9 DDR Interfaces
  11. 10Power Decoupling
  12. 11Route Lowest Priority Interfaces Last
  13. 12Summary

4 Via Sharing

The FC-BGA pattern implemented on the AM62Ax design offers opportunities for via sharing. Vias are shared across BGA pins. Figure 4-1 and Figure 4-2 show the via sharing opportunities for VDD_LDDR4 and VSS power supplies, respectively. Via sharing across BGA pins provides for easier escape routing and also robust electrical connection by connecting multiple pins.

GUID-20230201-SS0I-K741-RSRK-N5FZRQGFGXVH-low.png Figure 4-1 Via Sharing for VDD_LPDDR4 Domain
GUID-20230201-SS0I-HMMS-G9CS-QJG6N07GCBNN-low.png Figure 4-2 Via Sharing for VSS