SPRUJ93 august   2023

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1.     Preface: Read This First
      1. 1.1.1 Sitara™ MCU+ Academy
      2. 1.1.2 If You Need Assistance
      3. 1.1.3 Important Usage Notes
    2. 1.1 Introduction
    3. 1.2 Kit Contents
    4. 1.3 Specification
    5. 1.4 Device Information
    6. 1.5 HSEC 180-pin Control Card Docking Station
    7. 1.6 Security
  6. 2Hardware
    1. 2.1  Functional Block Diagram
    2. 2.2  Component Identification
    3. 2.3  Power Requirements
      1. 2.3.1 Power Input Using USB Type-C Connector
      2. 2.3.2 Power Status LEDs
      3. 2.3.3 Power Tree
      4. 2.3.4 Power Sequence
      5. 2.3.5 PMIC
    4. 2.4  Reset
    5. 2.5  Clock
    6. 2.6  Boot Mode Selection
    7. 2.7  JTAG Path Selection
    8. 2.8  Header Information
    9. 2.9  GPIO Mapping
    10. 2.10 Push Buttons
    11. 2.11 Test Points
    12. 2.12 Interfaces
      1. 2.12.1  Memory Interface
        1. 2.12.1.1 QSPI
        2. 2.12.1.2 Board ID EEPROM
      2. 2.12.2  Ethernet Interface
        1. 2.12.2.1 RGMII
        2. 2.12.2.2 PRU-ICSS
        3. 2.12.2.3 LED Indication in RJ45 Connector
      3. 2.12.3  I2C
      4. 2.12.4  Industrial Application LEDs
      5. 2.12.5  SPI
      6. 2.12.6  UART
      7. 2.12.7  MCAN
      8. 2.12.8  FSI
      9. 2.12.9  JTAG
      10. 2.12.10 Test Automation Header
      11. 2.12.11 LIN
      12. 2.12.12 MMC
      13. 2.12.13 ADC and DAC
    13. 2.13 HSEC Pinout and Pinmux Mapping
  7. 3Software
    1. 3.1 SDK Installation
  8. 4Hardware Design Files
  9. 5Additional Information
    1. 5.1 Trademarks
    2. 5.2 E1 Design Hardware Modifications
  10. 6References
    1. 6.1 Reference Documents
    2. 6.2 Other TI Components Used in This Design

2.5 Clock

The AM263x SoC requires a 25-MHz clock input for XTAL_XI. All reference clocks required for the SoC and the three Ethernet PHYs are generated from a single four output clock buffer (LMK1C1104PWR), which is sourced from a single 25-MHz LVCMOS Oscillator by default. A clock buffer is used for level translation from 3.3 V to 1.8 V.

The Control Card also requires a 16-MHz clock source for the TM4C129 microcontroller for UART-USB JTAG support.

GUID-20230515-SS0I-LXLF-2F15-NTFNSTVPHQXT-low.png

Alternatively, the SoC clock input can be sourced from a single 25-MHz crystal. To use the crystal there must be resistors mounted and unmounted as shown in Table 3-3. When the using a crystal as the SoC clock source, then the AM263x CLKOUT0 signal is used to source the four output clock buffer for the Ethernet PHY reference clock signals.

GUID-20230515-SS0I-XHFD-BBSD-DHG9LXQTMKMD-low.png Figure 2-13 Crystal Clock Tree

The following table describes the proper resistors to be mounted and DNI'd for each clock source configuration.

Table 2-3 Clock Source
Clock Source Mounted DNI
25-MHz LVCMOS Oscillator (default) R161, R135 R158, R155, R134
25-MHz Crystal R158, R155, R134 R161, R135