Introduction

Among all power factor correction (PFC) topologies, totem-pole bridgeless PFC provides the best efficiency; therefore, it is widely used in servers and data centers. However, closing the current control loop of a continuous conduction mode (CCM) totem-pole bridgeless PFC is not as straightforward as it is for a traditional PFC. A traditional PFC operating in CCM employs an average current-mode controller [1], as shown in Figure 1, where V_REF is the voltage-loop reference, V_OUT is the sensed PFC output voltage, Gv is the voltage loop, V_IN is the sensed PFC input voltage, I_REF is the current-loop reference, I_IN is the sensed PFC inductor current, G_I is current loop, and d is the duty ratio of pulse-width modulation (PWM). Since the bridge rectifier is used in a traditional PFC, all these values are positive, and current feedback signal I_IN is the rectified input current signal.

New feedback signal

Since the inductor current in the totem-pole bridgeless PFC is bidirectional, the current-sense method used in traditional PFC will not work. Instead, you will need a bidirectional current sensor such as Hall-effect sensor to sense the bidirectional inductor current and provide a feedback signal to the control loop.

The output of the Hall-effect sensor will not 100% match the sensed current, though. For example, if the sensed current is a sine wave, then the output of the Hall-effect sensor is a sine wave with a DC offset, as shown in Figure 2. Thus, you can’t use it as the feedback signal in the current-mode controller shown in Figure 1, and you will have to modify the controller to accommodate this new feedback signal. In this power tip, I’ll describe three ways to close the current control loop with this new feedback signal.

Method 1: Controllers without a negative loop reference

Some digital controllers, such as the UCD3138 from Texas Instruments (TI), use a hardware state machine to implement the control loop; therefore, all of the input signals to the state machine must be greater or equal to zero. In such cases, follow these steps to close the current control loop:

1. Sense the AC line and AC neutral voltage through two analog-to-digital-converters (ADCs) separately.
2. Use firmware to rectify the sensed V_AC signal, as shown in Equation 1 and Figure 3.
   Equation 1. $$\begin{array}{l}\text{ if }\left(V_L>V_N\right)*V_{IN}=V_L-V_N\hfill \\ \text{ else }{V}_{IN}=V_N-V_L\hfill \end{array}$$
   Figure 3 Using the firmware shown in Equation 1 to rectify the sensed input voltage V_AC. Source: Texas Instruments
3. Calculate the sinusoidal reference, V_SINE, using the same method as when calculating I_REF in traditional PFC, as shown in Equation 2 and Figure 4.
   Equation 2. $$V_{SINE}=\frac{G_V\times V_{IN}}{V_{IN\_RMS}^2}$$
   Figure 4 Calculating a sinusoidal reference (V_SINE) using the same method as when calculating I_REF in traditional PFC. Source: Texas Instruments
4. Use a Hall-effect sensor output as the current feedback signal I_IN directly (Equation 3).
   Equation 3. $$I_{IN}=Hall-effectsensoroutput$$
5. During the positive AC cycle, if you compare the shape of V_SINE and the Hall-effect sensor output, they have the same shape. The only difference is the DC offset. Use Equation 4 to calculate the current-loop reference, I_REF.
   Equation 4. $$I_{REF}=V_{SINE}+DCoffset$$
6. The control loop has standard negative feedback control. Use Equation 5 to calculate the error that goes to the control loop:
   Equation 5. $$Error=I_{REF}-I_{IN}$$
7. During the negative AC cycle, if you compare the shape of V_SINE and the Hall-effect sensor output, the difference is not only the DC offset; their shapes are opposite as well. Use Equation 6 to calculate the current-loop reference, I_REF.
   Equation 6. $$I_{REF}=DCoffset-V_{\text{SINE}}$$
8. During the negative AC cycle, the higher the inductor current, the lower the value of the Hall-effect sensor output. The control loop needs to change from negative feedback to positive feedback. Use Equation 7 to calculate the error going to the control loop.
   Equation 7. $$Error=I_{IN}-I_{REF}$$

Method 2: A pure firmware-based controller

For a pure firmware-based digital controller such as the TI C2000 microcontroller, the control loop is implemented with firmware, which means that the internal calculation parameters can be positive or negative. In such cases, follow these steps to close the current control loop:

1. Sense the AC line and AC neutral voltage through two ADCs. Then use the line voltage to subtract the neutral voltage to obtain V_IN, as shown in Equation 8 and Figure 5.
   Equation 8. $$V_{IN}=V_L-V_N$$
   Figure 5 Calculating V_IN after using the line voltage to subtract the neutral voltage. Source: Texas Instruments
2. Calculate the sinusoidal current-loop reference, I_REF, using the same method as in traditional PFC, as shown in Equation 9 and Figure 6.
   Equation 9. $$I_{REF}=\frac{G_V\times V_{IN}}{V_{IN\_RMS}^2}$$
   Figure 6 Calculating I_REF using the same method as the traditional PFC. Source: Texas Instruments
3. If you compare the shape of I_REF and the Hall-effect sensor output, they have the same shape; the only difference is the DC offset. Use Equation 10 to calculate the input current feedback signal, I_IN. Figure 7 shows the waveform.
   Equation 10. $$I_{IN}=Hallsensoroutput-DCoffset$$
   Figure 7 The waveform of the Hall sensor output and DC offset to calculate I_IN. Source: Texas Instruments
4. During the positive AC cycle, the control loop has standard negative feedback control. Use Equation 11 to calculate the error going to the control loop:
   Equation 11. $$Error=I_{REF}-I_{IN}$$
5. During the negative AC cycle, the higher the inductor current, the lower the value of the Hall-effect sensor output; thus, the control loop needs to change from negative feedback to positive feedback. Use Equation 12 to calculate the error going to the control loop.
   Equation 12. $$Error=I_{IN}-I_{REF}$$

Method 3: Duty-ratio feedforward control

Total harmonic distortion (THD) requirements are becoming stricter, especially in server and data-center applications. Reducing THD necessitates pushing the control-loop bandwidth higher and higher. High bandwidths reduce phase margins, resulting in loop instability. The limited PFC switching frequency also prevents bandwidths from going very high. To solve this problem, you can add a precalculated duty cycle to the control loop to generate PWM; this is called duty-ratio feedforward control (d_FF) [2], [3].

For a boost topology operating in CCM mode, Equation 13 calculates d_FF as:

This duty-ratio pattern effectively produces a voltage across the switch whose average over a switching cycle is equal to the rectified input voltage. A regular current-loop compensator changes the duty ratio around this calculated duty-ratio pattern. Since the impedance of the boost inductor at the line frequency is very low, a small variation in the duty ratio produces enough voltage across the inductor to generate the required sinusoidal current waveform so that the current-loop compensator does not need to have a high bandwidth.

Figure 8 depicts the resulting control scheme. Adding the calculated d_FF to the traditional average current-mode control output, d_I, results in the final duty ratio, d, used to generate the PWM waveform to control PFC.

To leverage the advantages of d_FF in a totem-pole bridgeless PFC, follow these steps to close the current loop:

1. Follow steps 1, 2, 3, 4 and 5 from Method 2.
2. Calculate d_FF, as shown in Equation 14. Since V_IN is a sine wave and its value is negative in a negative AC cycle, use its absolute value for the calculation.
   Equation 14. $$d_{FF}=\frac{V_{OUT}-\left|V_{IN}\right|}{V_{OUT}}$$
3. Use Equation 15 to add d_FF to the G_I output, d_I, and obtain the final d.

You can also use d_FF control for a hardware state machine-based controller; for details, see reference [2].

Closing the current loop

Closing the current loop of a totem-pole bridgeless PFC is not as straightforward as in a traditional PFC; it may also vary from controller to controller. This power tip can help you eliminate the confusion around control-loop implementations in a totem-pole bridgeless PFC, and choose the appropriate method for your design.

Related Content

• Power Tips #108: Current sensing considerations in a bridgeless totem pole PFC
• A comparison of interleaved boost and totem-pole PFC topologies
• Power Tips #116: How to reduce THD of a PFC
• Power Tips #132: A low-cost and high-accuracy e-meter solution

References

1. Dixon, Lloyd. “High Power Factor Preregulator for Off-Line Power Supplies.” Texas Instruments Power Supply Design Seminar SEM600, literature No. SLUP087, 1988.
2. Sun, Bosheng. “Duty Ratio Feedforward Control of Digitally Controlled PFC.” Power Systems Design, Dec. 3, 2014.
3. Van de Sype, David M., Koen De Gussemé, Alex P.M. Van den Bossche, and Jan A. Melkebeek. “Duty-Ratio Feedforward for Digitally Controlled Boost PFC Converters.” Published in IEEE Transactions on Industrial Electronics 52, no. 1 (February 2005): pp. 108-115.

Previously published on EDN.com.