The phase-shifted full bridge (PSFB) shown in Figure 1 is popular in applications >500 W because it can achieve soft switching on its input switches for high converter efficiency. Although switching losses are greatly reduced, you can still expect to see high-voltage stress on the output rectifier, as its parasitic capacitance resonates with the transformer leakage inductance—modeled as L_r in Figure 1. The voltage stress of the output rectifier could be as high as 2V_INN_S/N_P, where N_P and N_S are the transformer primary and secondary windings, respectively.

Limiting the maximum voltage stress on the output rectifier traditionally requires a passive snubber [1] such as a resistor-capacitor-diode (RCD) snubber, but the use of a passive snubber will dissipate power, resulting in an efficiency penalty.

Alternatively, you could apply an active snubber to clamp the rectifier voltage stress without dissipating any power in the snubber circuit (assuming an ideal switch) [2]. Figure 2 shows the insertion of an active clamp leg (ACL) formed by a capacitor (C_CL) and a MOSFET (Q_CL) before the output inductor. When the output winding voltage becomes non-zero, energy will transfer from the primary winding to the secondary winding to energize the output inductor while also conducting current through the Q_CL body diode to charge C_CL, even if Q_CL isn’t turned on. You can turn on Q_CL after its body diode has already conducted current to ensure zero voltage switching (ZVS) on Q_CL.

It’s important to turn on Q_CL before the current in the active clamp MOSFET (i_CL)polarity changes to allow the current-second balance on C_CL to be complete by the beginning of the effective duty cycle (D_effT_S). In other words, Q_CL only needs to be turned on long enough for the current-second balance of the active snubber to work as intended, clamping the output rectifier voltage to the C_CL voltage (V_CL). In other words, Q_CL doesn’t need to conduct throughout the full D_effT_S, but for a relatively short period of time instead. As such, Q_CL can have a fixed on-time—that is, the Q_CL on time (D_ACLT_S) is constant—while keeping D_effT_S always greater than the duration where the current-second balance (D_CSBT_S) is complete.

This approach addresses one of the challenges when using an active snubber in that the transformer winding current does not rise monotonically—which is an issue if you are using peak current-mode control. This happens because the active snubber capacitor energy also participates in energizing the output inductor, rather than solely relying on energy transfer from the primary side. Since D_effT_S is larger than D_CSBT_S, peak current detection can occur when the transformer current is rising monotonically. And because you can expect higher efficiency for a PSFB with a larger D_eff, you can design the PSFB to have a larger D_eff at mid to heavy loads, where D_eff >> D_CSB. At light loads, the converter should operate in discontinuous conduction mode, where D_eff will be smaller than D_eff in continuous conduction mode at the same input/output voltage condition. In order to keep D_effT_S greater than D_CSBT_S even at light loads, you can use frequency-reduction control or burst-mode control.

Because the C_CL ripple voltage affects the total voltage stress on the output rectifier, you must select a large-enough C_CL for a low capacitor ripple voltage. You must also select C_CL such that the inductor-capacitor (LC) resonant period formed by L_r and C_CL is much longer than the switching period [3], expressed by Equation 1:

The rectifier voltage stress will clamp to around V_INN_S/N_P with the active snubber, which is half of the voltage stress without any clamp circuit. Unlike the passive snubber in [1], the active snubber doesn’t dissipate the ringing energy on the power resistor but circulates the energy in the LC resonant tank as a lossless snubber. Therefore, you can expect higher converter efficiency on a PSFB with an active snubber than a PSFB with a passive snubber in an identical specification.

To understand the factors that determine the ACL current level, you’ll need to calculate the current flow through the ACL itself. Figure 3 illustrates waveforms around the ACL conduction period.

Assuming that V_CL is a constant and L_m = ∞, Equation 2 derives the current in one side of the output rectifier (i_SR2) as the drain to source voltage rises as:

By assuming i_SR2 current decreases at a constant rate, Equation 3 derives the time duration of t₂-t₁ as:

Since C_CL needs to maintain current-second balance, the sum of areas A1 and A3 will equal area A2. With all of this information, it is possible to calculate the root-mean-square (RMS) value of i_CL. As Equation 3 shows, the synchronous rectifier (SR) output capacitance (C_oss) controls the peak current on the ACL. If you select a lower C_oss SR FET, the ACL RMS current will be lower and thus help improve converter efficiency.

Figure 4 shows waveforms of the Texas Instruments (TI) 54-V, 3-kW phase-shifted full bridge with active clamp reference design, which is a 400V input, 54V output, 3kW PSFB converter using an active clamp realized with TI’s C2000™ microcontroller. In this design, the transformer turns ratio is Np:Ns = 16:3. With the ACL FET turned on only for 300ns within the output inductor energizing period, the output rectifier voltage stress (Ch1 in Figure 4) is limited to 80V, even at a 3kW load. The lower voltage stress enables the use of SR FETs with a lower voltage rating and a better figure of merit to further improve the efficiency of the PSFB.

This control method isn’t limited to a full-bridge rectifier with one ACL; you can also apply it to an active snubber with other types of rectifiers such as a current doubler [4] or a center-tapped rectifier. TI’s 3-kW phase-shifted full bridge with active clamp reference design with >270-W/in³ power density has a 400V input, 12V output, 3kW PSFB converter with an active clamp where the secondary side uses a center-tapped rectifier. The output rectifier stress (Ch1 in Figure 5) is limited to 40V at a 3kW load.

The merit of an active clamp in a PSFB converter

The implementation of an active snubber in a PSFB converter significantly reduces the maximum voltage stress on the output rectifiers. This reduction in voltage stress enables the use of an SR FET with a lower drain-to-source voltage rating, which can have a better figure of merit. While an active clamp can create challenges with the implementation of peak current-mode control, proper implementation enables the use of an active clamp and peak current-mode control in harmony. This combination achieves higher power density and higher efficiency compared to traditional PSFB implementations.

Related Content

• Power Tips #120: How isolated bias transformer parasitic capacitance impacts EMI performance
• Power Tips #119: How to characterize a power transformer for EMI performance
• Power Tips #118: Using interleaved ground planes to improve noise filtering from isolated power supplies
• Power Tips #117: Measure your LLC resonant tank before testing at full operating conditions

References

1. Lin, Song-Yi, and Chern-Lin Chen. “Analysis and Design for RCD Clamped Snubber Used in Output Rectifier of Phase-Shift Full-Bridge ZVS Converters.” Published in IEEE Transactions on Industrial Electronics 45, no. 2 (April 1998): pp. 358-359.
2. Sabate, J.A., V. Vlatkovic, R.B. Ridley, and F.C. Lee. “High-Voltage, High-Power, ZVS, Full-Bridge PWM Converter Employing an Active Snubber.” Published in Sixth Annual Applied Power Electronics Conference and Exhibition (APEC), March 10-15, 1991, pp. 158-163.
3. Nene. “Digital Control of a Bidirectional DC-DC Converter for Automotive Applications.” Published in 28th Annual Applied Power Electronics Conference and Exposition (APEC), March 17-21, 2013, pp. 1360-1365.
4. Balogh, Laszlo. “Design Review: 100 W, 400 kHz, DC/DC Converter with Current Doubler Synchronous Rectification Achieves 92% Efficiency.” Texas Instruments Power Supply Design Seminar SEM100, literature No. SLUP111, 1996.

Previously published on EDN.com.