SWRS256A March   2022  – April 2025 CC1311R3

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Functional Block Diagram
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
    1. 6.1 Pin Diagram—RGZ Package (Top View)
    2. 6.2 Signal Descriptions—RGZ Package
    3. 6.3 Pin Diagram—RKP Package (Top View)
    4. 6.4 Signal Descriptions—RKP Package
    5. 6.5 Connections for Unused Pins and Modules
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Power Supply and Modules
    5. 7.5  Power Consumption - Power Modes
    6. 7.6  Power Consumption - Radio Modes
    7. 7.7  Nonvolatile (Flash) Memory Characteristics
    8. 7.8  Thermal Resistance Characteristics
    9. 7.9  RF Frequency Bands
    10. 7.10 861MHz to 1054MHz—Receive (RX)
    11. 7.11 861 MHz to 1054 MHz - Transmit (TX) 
    12. 7.12 861 MHz to 1054 MHz - PLL Phase Noise Wideband Mode
    13. 7.13 861 MHz to 1054 MHz - PLL Phase Noise Narrowband Mode
    14. 7.14 359MHz to 527MHz—Receive (RX)
    15. 7.15 359 MHz to 527 MHz - Transmit (TX) 
    16. 7.16 359 MHz to 527 MHz - PLL Phase Noise
    17. 7.17 Timing and Switching Characteristics
      1. 7.17.1 Reset Timing
      2. 7.17.2 Wakeup Timing
      3. 7.17.3 Clock Specifications
        1. 7.17.3.1 48 MHz Crystal Oscillator (XOSC_HF)
        2. 7.17.3.2 48 MHz RC Oscillator (RCOSC_HF)
        3. 7.17.3.3 32.768 kHz Crystal Oscillator (XOSC_LF)
        4. 7.17.3.4 32 kHz RC Oscillator (RCOSC_LF)
      4. 7.17.4 Synchronous Serial Interface (SSI) Characteristics
        1. 7.17.4.1 Synchronous Serial Interface (SSI) Characteristics
        2.       40
      5. 7.17.5 UART
        1. 7.17.5.1 UART Characteristics
    18. 7.18 Peripheral Characteristics
      1. 7.18.1 ADC
        1. 7.18.1.1 Analog-to-Digital Converter (ADC) Characteristics
      2. 7.18.2 DAC
        1. 7.18.2.1 Digital-to-Analog Converter (DAC) Characteristics
      3. 7.18.3 Temperature and Battery Monitor
        1. 7.18.3.1 Temperature Sensor
        2. 7.18.3.2 Battery Monitor
      4. 7.18.4 Comparator
        1. 7.18.4.1 Continuous Time Comparator
      5. 7.18.5 GPIO
        1. 7.18.5.1 GPIO DC Characteristics
    19. 7.19 Typical Characteristics
      1. 7.19.1 MCU Current
      2. 7.19.2 RX Current
      3. 7.19.3 TX Current
      4. 7.19.4 RX Performance
      5. 7.19.5 TX Performance
      6. 7.19.6 ADC Performance
  9. 8 Detailed Description
    1. 8.1  Overview
    2. 8.2  System CPU
    3. 8.3  Radio (RF Core)
      1. 8.3.1 Proprietary Radio Formats
    4. 8.4  Memory
    5. 8.5  Cryptography
    6. 8.6  Timers
    7. 8.7  Serial Peripherals and I/O
    8. 8.8  Battery and Temperature Monitor
    9. 8.9  Voltage Supply Domains
    10. 8.10 µDMA
    11. 8.11 Debug
    12. 8.12 Power Management
    13. 8.13 Clock Systems
    14. 8.14 Network Processor
  10. 9 Application, Implementation, and Layout
    1. 9.1 Reference Designs
    2. 9.2 Junction Temperature Calculation
  11. 10Device and Documentation Support
    1. 10.1 Device Nomenclature
    2. 10.2 Tools and Software
      1. 10.2.1 SimpleLink™ Microcontroller Platform
    3. 10.3 Documentation Support
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

7.16 359 MHz to 527 MHz - PLL Phase Noise

When measured on the LAUNCHXL-CC1352P-4 reference design with Tc = 25 °C, VDDS = 3.0 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Phase noise in the 433 MHz band
20 kHz PLL loop bandwidth		 ±10 kHz offset -82 dBc/Hz
±100 kHz offset -105 dBc/Hz
±200 kHz offset -112 dBc/Hz
±400 kHz offset -119 dBc/Hz
±1000 kHz offset -127 dBc/Hz
±2000 kHz offset -133 dBc/Hz
±10000 kHz offset -141 dBc/Hz