SWRS300 September   2026 CC1404P

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Power Consumption (Power Modes)
    5. 6.5  Power Consumption (Radio Modes)
    6. 6.6  RF Frequency Bands
    7. 6.7  Reset Timing
    8. 6.8  Temperature Sensor
    9. 6.9  Battery Monitor
    10. 6.10 GPIO DC Characteristics
    11. 6.11 SPI Characteristics
    12. 6.12 DC/DC
    13. 6.13 48MHz Crystal Oscillator (HFXT)
    14. 6.14 48MHz Clock Output Buffer
    15. 6.15 48MHz Clock Input (TCXO)
    16. 6.16 32kHz RC Oscillator (LFOSC)
    17. 6.17 782MHz - 957MHz Receive (RX)
    18. 6.18 782 MHz - 957 MHz Transmit (TX)
    19. 6.19 RF PLL Phase Noise and Spurious
  8. 7 Detailed Description
    1. 7.1 Radio (RF Core)
    2. 7.2 Memory
    3. 7.3 Battery and Temperature Monitor
    4. 7.4 Proprietary Radio Form
    5. 7.5 Power Management
  9. 8 Application, Implementation, and Layout
    1. 8.1 Reference Designs
      1. 8.1.1 Highest Performance
      2. 8.1.2 Balanced Performance
      3. 8.1.3 Lowest external Bill of Material (eBOM)
      4. 8.1.4 Long Range low external Bill of Material
      5. 8.1.5 Antenna Kit for LaunchPad
  10. 9 Device and Documentation Support
    1. 9.1 Device Nomenclature
    2. 9.2 Tools and Software
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Documentation Support
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Export Control Notice
    8. 9.8 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Packaging Information

Radio (RF Core)

The low-power RF Core (LRF) implements a high-performance and highly flexible RF subsystem containing RF and baseband circuitry in addition to a software-defined digital radio (LRFD). LRFD provides a high-level, command-based API to a host CPU and handles all of the timing-critical and low-level details of many different radio PHYs. Several signals are also available to control external circuitry, such as RF switches or range extenders, autonomously. The modem is highly configurable and has the flexibility to support future standards. It is not programmable by customers but is instead loaded with precompiled images provided in the radio driver in the SimpleLink™ software development kit (SDK). This mechanism allows the radio platform to be updated for support of future versions of standards with over-the-air (OTA) updates while still using the same silicon. LRFD stores the code images in the RF SRAM and does not make use of any ROM memory; thus, image loading from flash only occurs once after boot, and no patching is required when exiting power modes.