SWRZ148A December   2024  – December 2025 IWRL6432W

1.   1
2.   ABSTRACT
3. 1Introduction
4. 2Device Nomenclature
5. 3Device Markings
6. 4Usage Notes
   1. 4.1 Power up sequence in power optimized topology
   2. 4.2 Meeting data sheet spec for 1.2V Digital LDO output path in BOM optimized topology
7. 5Advisory to Silicon Variant / Revision Map
8. 6Known Design Exceptions to Functional Specifications
   1. 6.1  ANA #51
   2. 6.2  ANA #57
   3. 6.3  DIG #1
   4. 6.4  DIG #3
   5. 6.5  DIG #4
   6. 6.6  DIG #5
   7. 6.7  DIG #6
   8. 6.8  DIG #8
   9. 6.9  DIG #9
   10. 6.10 DIG #10
   11. 6.11 DIG #14
   12. 6.12 DIG #15
   13. 6.13 DIG #16
9. 7Trademarks
10.   Revision History