TIDUF12 December   2022

 

  1.   Description
  2.   Resources
  3.   Features
  4.   Applications
  5.   5
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 Devices
        1. 2.3.1.1 AWR2243
        2. 2.3.1.2 AM2732R
        3. 2.3.1.3 LP876242-Q1
        4. 2.3.1.4 LM62460-Q1
        5. 2.3.1.5 TCAN1043A-Q1
        6. 2.3.1.6 TCAN1044A-Q1
        7. 2.3.1.7 DP83TC812-Q1
        8. 2.3.1.8 TPS61379-Q1
        9. 2.3.1.9 TMP102-Q1
  8. 3System Design Theory
  9. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Hardware Requirements
    2. 4.2 Test Setup
      1. 4.2.1 Virtual Antenna Array
    3. 4.3 Test Results
      1. 4.3.1 Angle Resolution Measurement
  10. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
      3. 5.1.3 PCB Layout Recommendations
        1. 5.1.3.1 20 GHz (FMCW) RF LO Sync
        2. 5.1.3.2 PCB Layer Stackup
        3. 5.1.3.3 Board Photos
    2. 5.2 Tools and Software
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks

2.3.1.6 TCAN1044A-Q1

The TCAN1044A-Q1 is a high speed controller area network (CAN) transceiver that meets the physical layer requirements of the ISO 11898-2:2016 highspeed CAN specification.

The TCAN1044A-Q1 transceiver supports both classical CAN and CAN FD networks up to 8 megabits per second (Mbps). The TCAN1044A-Q1 includes internal logic level translation via the VIO terminal to allow for interfacing the transceiver I/Os directly to 1.8 V, 2.5 V, 3.3 V, or 5 V logic I/Os. The transceiver supports a low-power standby mode and wake over CAN compliant to the ISO 11898-2:2016 defined wake-up pattern (WUP). The TCAN1044A-Q1 transceiver also includes protection and diagnostic features supporting thermal-shutdown (TSD), TXDdominant time-out (DTO), supply undervoltage detection, and bus fault protection up to ±58 V.