TIDUF14 October   2022

 

  1.   Description
  2.   Resources
  3.   Features
  4.   Applications
  5.   5
  6. 1System Description
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 BQ76952
      2. 2.3.2 LM5163
      3. 2.3.3 MSP430FR2155
      4. 2.3.4 ISO1042
      5. 2.3.5 TPS54308
      6. 2.3.6 ISO7731
      7. 2.3.7 THVD1400
      8. 2.3.8 UCC27524
      9. 2.3.9 TMP61
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Test Setup
    3. 3.3 Test Results
      1. 3.3.1 Cell Voltage Accuracy
      2. 3.3.2 Pack Current Accuracy
      3. 3.3.3 Auxiliary Power and System Current Consumption
      4. 3.3.4 Cell Balancing
      5. 3.3.5 Protection
      6. 3.3.6 Working Modes Transition
  9. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  10. 5About the Author

3.2 Test Setup

Use the following procedures before running this design board. The design was constructed with 16s pack configurations. The board was tested using DC source and 4900-μF electrolytic capacitor in parallel to simulate the total pack. Sixteen 1-kΩ resisters in series are used to divide the pack voltage and simulate 16s battery cells.

Figure 3-1 shows the charge process setup example.

  • DC source 1 configurations: 58 V – 3 A
  • DC source 2 configurations: 48 V – 0.5 A
  • Electronic load configurations: 48-V CV mode
Figure 3-1 Charge Setup

Figure 3-2 shows the discharge process setup example.

  • DC source 1 configurations: 48 V, 20 A
  • Electronic load configurations: CC mode
Figure 3-2 Discharge Setup