TIDUF33 june   2023

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 Current and Voltage Controller
      2. 2.2.2 High-Resolution PWM Generation
    3. 2.3 Highlighted Products
      1. 2.3.1 TMS320F280039
      2. 2.3.2 ADS131M08
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Software Requirements
      1. 3.2.1 Opening the Project Inside Code Composer Studio
      2. 3.2.2 Project Structure
      3. 3.2.3 Software Flow Diagram
    3. 3.3 Test Setup
      1. 3.3.1 Hardware Setup to Tune the Current and Voltage Loops
      2. 3.3.2 Hardware Setup to Test Bidirectional Power Flow
      3. 3.3.3 Hardware Setup for Current and Voltage Calibration
    4. 3.4 Test Procedure
      1. 3.4.1 Lab Variables Definitions
      2. 3.4.2 Lab 1. Open-Loop Current Control Single Phase
        1. 3.4.2.1 Setting Software Options for Lab 1
        2. 3.4.2.2 Building and Loading the Project and Setting up Debug Environment
        3. 3.4.2.3 Running the Code
      3. 3.4.3 Lab 2. Closed Loop Current Control Single Phase
        1. 3.4.3.1 Setting Software Options for Lab 2
        2. 3.4.3.2 Building and Loading the Project and Setting up Debug Environment
        3. 3.4.3.3 Running the Code
        4. 3.4.3.4 Current Calibration
      4. 3.4.4 Lab 3. Closed Loop Current Control Dual Phase
        1. 3.4.4.1 Setting Software Options for Lab 3
        2. 3.4.4.2 Building and Loading the Project and Setting up Debug Environment
        3. 3.4.4.3 Running the Code
      5. 3.4.5 Lab 4. Closed Loop Current and Voltage Control
        1. 3.4.5.1 Setting Software Options for Lab 4
        2. 3.4.5.2 Building and Loading the Project and Setting up Debug Environment
        3. 3.4.5.3 Running the Code
        4. 3.4.5.4 Voltage Calibration
    5. 3.5 Test Results
      1. 3.5.1 Current Loop Load Regulation Error
      2. 3.5.2 Voltage Loop Load Regulation Error
      3. 3.5.3 Voltage Transition at No Load
      4. 3.5.4 Transient Response at Start-Up
      5. 3.5.5 Bidirectional Current Switching Time
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author

3.4.3.1 Setting Software Options for Lab 2

  1. To run this lab, make sure the hardware is set up as outlined in the previous section,Section 3.4.2.
  2. Open the CCS project as outlined in Section 3.2.1. If using the powerSUITE, go to Step 3, otherwise jump to Step 4.
  3. Open the SYSCONFIG page and select under the Build Options section:
    • Select Lab 2: Closed Loop CC Single Phase for the Lab.
    • Change the Phase Enabled to Phase 1 or Phase 2>
    • Set the SFRA Enable/Disable to 1.
    • Open the Compensation Designer GUID-0D91F690-0455-4B7C-8C52-DEA95E958A36-low.png by clicking the Run Compensation Design button.
    • The compensation designer then launches and prompts the user to select a valid SFRA data file. Import the SFRA data from the run in Lab 1 into the compensation designer to design a two-pole, two-zero compensator. Keep more margins during this iteration of the design to make sure that when the loop is closed, the system is stable.
    • Figure 3-24 shows compensation parameters for the Current Loop.
    • Click on the Save Comp button to save the compensation. Close the Compensation Designer tool.
    • Save the SYSCONFIG page.
  4. When using non-powerSuite version of the project, Build Settings are directly modified in solution_settings.h file. Compensation Designer is found at C2000Ware_DigitalPower_Install_Location\powerSUITE\source\utils.

    #define LAB_NUMBER (2)

    #define PHASE_NUMBER (1)

    #define SFRA_ENABLED (true)

GUID-20230628-SS0I-5KRK-2HD7-HPVNGZWDQHNH-low.png Figure 3-16 Tuning Current Loop Using Compensation Designer