TIDUF68 February   2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 LMG2100
      2. 2.3.2 INA241A
      3. 2.3.3 LMR38010
  9. 3System Design Theory
    1. 3.1 Three-Phase GaN Inverter Power Stage
      1. 3.1.1 LMG2100 GaN Half-Bridge Power Stage
    2. 3.2 Inline Shunt Precision-Phase Current Sensing With INA241A
    3. 3.3 Phase Voltage and DC Input Voltage Sensing
    4. 3.4 Power-Stage PCB Temperature Monitor
    5. 3.5 Power Management
      1. 3.5.1 48V to 5V DC/DC Converter
      2. 3.5.2 5V to 3.3V Rail
    6. 3.6 Interface to Host MCU
  10. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Hardware Requirements
      1. 4.1.1 TIDA-010936 PCB Overview
      2. 4.1.2 TIDA-010936 Jumper Settings
      3. 4.1.3 Interface to C2000™ MCU LaunchPad™ Development Kit
    2. 4.2 Software Requirements
    3. 4.3 Test Setup
    4. 4.4 Test Results
      1. 4.4.1 Power Management and System Power Up and Power Down
    5. 4.5 GaN Inverter Half-Bridge Module Switch Node Voltage
      1. 4.5.1 Switch Node Voltage Transient Response at 48V DC Bus
        1. 4.5.1.1 Output Current at ±1A
        2. 4.5.1.2 Output Current at ±10A
      2. 4.5.2 Impact of PWM Frequency to DC-Bus Voltage Ripple
      3. 4.5.3 Efficiency Measurements
      4. 4.5.4 Thermal Analysis
      5. 4.5.5 No Load Loss Test (COSS Losses)
  11. 5Design and Documentation Support
    1. 5.1 Design Files [Required Topic]
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
      3. 5.1.3 PCB Layout Recommendations
        1. 5.1.3.1 Layout Prints
      4. 5.1.4 Altium Project
      5. 5.1.5 Gerber Files
      6. 5.1.6 Assembly Drawings
    2. 5.2 Tools and Software
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks
  12. 6About the Author
  13. 7Recognition

2.3.1 LMG2100

The LMG2100 100V GaN half-bridge power stage provides an integrated power stage design using enhancement-mode Gallium Nitride (GaN) FETs. The device consists of two GaN FETs driven by one high-frequency GaN FET driver in a half-bridge configuration, as shown in Figure 2-2. Key features for this design are summarized in Table 2-1.


GUID-E5FBF3F6-F652-4BD2-A02C-108B8A07D886-low.svg

Figure 2-2 LMG2100 Functional Block Diagram
Table 2-1 LMG2100 Features and Benefits
FEATUREBENEFIT
Integrated high-side and low-side GaN driver and 80V GaN FETs, 4.4mΩ devices for 35A DC operation.Enables up to 60VDC, three-phase inverter with 16ARMS phase current at 80kHz high-switching frequency for low inductance and high-speed drives.
Integrated 80V, 4.4mΩ, GaN FETs and GaN driver with completely bond-wire-free package. Minimized package parasitic elements enable ultra-fast switching for reduced switching losses to reduce or eliminate heat sink.
GaN FETs have zero reverse recovery (3rd quadrant operation) and very small input capacitance CISS. Reduces or eliminates ringing in hard switching, like in inverters reduce EMI. Very low overshoot and undershoot allows higher nominal DC-link voltage than Si-FET for same maximum rated voltage.
Excellent propagation delay matching (2ns FETs).Enables ultra-low dead band per half-bridge for major reduction of switching losses in three-phase inverter applications and elimination of dead-time distortions in the phase voltage.
Independent high-side and low-side transistor-transistor logic (TTL) inputs.Direct PWM interface to 3.3V MCU.
Single 5V gate driver supply with bootstrap voltage clamping and undervoltage lockout.Ease power management. UVLO provides simultaneous shutdown of high-side and low-side GaN FET in case of gate driver undervoltage
LMG2100 optimized pinout. Easy PCB layout with minimum inductance for reduced switching losses.
Two exposed GaN dies on top (SW and PGND).
Big PGND pad on bottom. 		Realize lower top thermal resistance.
Accepts both sides cooling.