TIDUFH5 March   2026 TPSI31P1-Q1

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1  Control Logic
      2. 2.2.2  Switching Power
        1. 2.2.2.1 Calculation: D
        2. 2.2.2.2 Calculation: 1 – D
        3. 2.2.2.3 Calculation: D + (1 – D)
      3. 2.2.3  Propagation Delay
      4. 2.2.4  MOSFET Selection
      5. 2.2.5  Flyback or Freewheeling Diode Selection
      6. 2.2.6  Sense Resistance Selection
      7. 2.2.7  Input Capacitance Selection
      8. 2.2.8  Output Capacitance Selection
      9. 2.2.9  Design Example #1: Single RSENSE Configuration
      10. 2.2.10 Design Example #2: Double RSENSE Configuration
    3. 2.3 Highlighted Products
      1. 2.3.1 TPSI31P1-Q1
      2. 2.3.2 TPS7A49
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Test Setup
    3. 3.3 Test Results
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
      3. 4.1.3 PCB Layout Recommendations
        1. 4.1.3.1 Use Large Return Planes to Contain Electromagnetic Fields
        2. 4.1.3.2 Minimize High diL/dt Loop Length to Control Oscillations and EMI
        3. 4.1.3.3 Minimize SW Node Area to Improve Ringing and Noise
        4. 4.1.3.4 Minimize Inductor Pad to Limit Parasitic Capacitive Coupling
        5. 4.1.3.5 HV Creepage and Clearance
        6. 4.1.3.6 Layout Prints
    2. 4.2 Tools
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Authors

MOSFET Selection

Prioritize selecting MOSFETs with the lowest QG to minimize driver current demand. MOSFETs typically have on-resistance (RON) inversely proportional to the total gate charge of the MOSFET. Selecting a MOSFET with lower gate charge typically results in higher heat dissipation because PDIS = I2 × RON. Since precharge is a transient event (< 1 second), the MOSFET can handle higher power dissipation than in steady state. According to the transient thermal resistance, 1 layer Copper foil surface area 73.8mm2 (footprint) image in Thermal Resistance Data: TO263-5 application note, the TO263 package with a single layer footprint-size copper foil surface area has steady-state thermal resistance (RTH) of 74.7°C/W. However, at a 1s pulse, the thermal resistance drops to 7.2°C/W. Given the thermal resistance and power dissipation, Equation 8 shows the thermal rise of the MOSFET package.

Equation 8. T F I N A L = P D I S × R T H + T A M B I E N T

Figure 2-5 shows typical MOSFET turn-on behavior.

TIDA-050082 Typical MOSFET Turn On Figure 2-5 Typical MOSFET Turn On

where

  • t0 – t1: CGS charges from zero to VGS(th). No change in VDS or IDS.
  • t1 – t2: CGS has reached threshold voltage to begin conducting so IDS rises to full load current. No change in VDS.
  • t2 – t3: Miller plateau region with relatively flat VGS, VDS falls.
  • t3 – t4: VGS rises beyond Miller plateau, VDS is down and further drops marginally with higher VGS.

Make sure the driver output rail (VDDH) remains above the Miller plateau. High power dissipation occurs when the MOSFET operates in the t1 – t2 and t2 – t3 (Miller plateau) regions. For the best performance, the MOSFET operates in the t3 – t4 region to achieve the lowest on-resistance (RON).