SBOA528 April   2022 OPA607

 

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Design Goals

Input Output Supply
2 VPP, 500 kHz
Square wave
Gain = 1 V/V Vcc Vee Vref
5 V 0 V 2.5 V

Design Description

A decompensated amplifier is defined as an amplifier that is not inherently stable below a minimum specified gain, but offers a higher gain bandwidth product (GBWP) and sometimes lower noise versus its unity-gain stable counterpart (see OPA858 versus OPA859). This circuit document presents three different external compensation methods for making these amplifiers unity-gain stable. Each circuit increases low gain stability at the expense of bandwidth. The first two circuits modify the amount-of-feedback (β) to increase the noise-gain (1/ β). The third circuit uses the output impedance of the amplifier in conjunction with an output load to attenuate the effective open-loop gain (AOL).

These examples stabilize the OPA607, a ≥ 6 V/V decompensated amplifier, in a unity-gain difference amplifier circuit.

Compensation Circuit 1: Differential Input Resistor (RIN)

GUID-20220329-SS0I-DHDT-7Q40-WGTBN9WQBVMG-low.png Circuit 1 Schematic
GUID-20220329-SS0I-QJDK-RLCT-HTW0G4R4DKR7-low.pngFrequency Response
GUID-20220329-SS0I-2JHQ-GQQP-0WXWWZRFPZLC-low.pngNoise-Gain (Amount of Feedback) Stability Analysis

Design Notes

Add a resistor (RIN) between the two inputs that is small enough to decrease the amount-of-feedback (β) to
≤ 1/6, and increase the noise-gain (1/ β) to ≥ 6. RIN does not affect the signal gain because of the virtual short between the two inputs. This method increases the noise gain of the amplifier uniformly across all frequencies, but sacrifices the least bandwidth.

Design Steps

In this difference amplifier circuit example, ΔV(RIN) is the voltage across resistor RIN in the circuit 1 schematic, and ΔV(OUT) is the voltage at Vout. β is the ratio ΔV(RIN) / ΔV(OUT) that is divided across the feedback. This ratio can be factored into:

β   = Δ V ( R I N ) Δ V ( O U T ) = Δ V ( I N - ) Δ V ( O U T ) × Δ V ( R I N ) Δ V ( I N - )

First, the amount of ΔV(OUT) fed back to ΔV(IN–) across the feedback resistor RF is:

Δ V ( I N - ) Δ V ( OUT ) = Z G Z G + R F

ZG represents the resistance out of IN–. To calculate ZG, add RIN to the resistance out of IN+, which is the parallel combination of R4 ll R5 ll R6. The result adds in parallel with the gain resistor RG at IN– to form ZG.

Z G = ( R I N + R 4 R 5 R 6 ) R G

Second, because of the series resistance out of IN+, the voltage ΔV(RIN) is only a fraction of ΔV(IN–).

Δ V ( R I N ) Δ V ( I N - ) = R I N R I N + R 4 R 5 R 6

When RIN = , β = 1/2 in this example circuit, where R4 ll R5 ll R6 = 500 Ω, RG= 1 kΩ, and RF= 1 kΩ. To stabilize the OPA607, set β = 1/6 and solve for RIN. This can also be solved with simulation, as shown in the noise-gain stability analysis image. RIN = 500 Ω raises the noise-gain up from 2 V/V to 6 V/V. A smaller RIN further increases 1/β.

Δ V ( I N - ) Δ V ( OUT ) = ( R I N + 500   Ω ) 1   k Ω ( R I N + 500   Ω ) 1   k Ω + 1   k Ω = 1 3
Δ V ( R I N ) Δ V ( I N - ) = R I N R I N + 500 = 1 2
β = Δ V ( I N - ) Δ V ( OUT ) × Δ V ( R I N ) Δ V ( I N - ) = 1 3 × 1 2 = 1 6

Design Results

The silver peaking in the Frequency Response and ringing in the Square-Wave Response are signs of < 45° of phase margin and instability. Simulation and measurement of this circuit (see the following images) show that RIN = 499 Ω is sufficient for external compensation and stability. The higher undershoot shown is due to the faster falling edge slew rate of the OPA607.

GUID-20220329-SS0I-XSJC-RMLV-BZPFPCXXFDJG-low.png500 kHz, 2 Vpp Square-Wave Response
Circuit 1 Measurement

Compensation Circuit 2: Feedback Capacitor (CF)

GUID-20220329-SS0I-LDJQ-XRZG-ZNSHJMSJTTGJ-low.png Circuit 2 Schematic
GUID-20220329-SS0I-VWCS-KXMJ-NHFLFJ3RRWJR-low.pngFrequency Response
GUID-20220329-SS0I-ZWR5-0BJV-1JVVLHFMP9NT-low.pngNoise-Gain (Amount of Feedback) Stability Analysis

Design Notes

Add a feedback capacitor (CF) which creates a high-frequency gain ≥ 6 V/V in conjunction with the amplifier input capacitance, but use RF / RG to set a lower signal gain at low frequency and DC. Ensure that the high-frequency noise-gain both is ≥ 6 V/V and is achieved within the gain-bandwidth of the amplifier. That is, in the noise-gain stability analysis image, the maroon AOL curve must intersect the olive 1/β (invBeta) curve where both the AOL curve is –20 dB/decade and the 1/β curve is flat versus frequency.

Design Steps

The high-frequency gain is set by a capacitor divider, formed between CF and the three parasitic input capacitances of the OPA607: CIN– = 5.5 pF; CIN+ = 5.5 pF; and CINDIFF = 11.5 pF. β is calculated with the same factors discussed in Circuit 1, but using these internal capacitors instead of external resistors.

β   = Δ V ( C I N D I F F ) Δ V ( O U T ) = Δ V ( I N - ) Δ V ( O U T ) × Δ V ( C I N D I F F ) Δ V ( I N - )

In this noise-gain stability analysis, CF = 8.2 pF raises the high-frequency capacitor gain to 6.57 V/V. A smaller feedback capacitor further decreases β and increases the high-frequency gain.

Δ V ( I N - ) Δ V ( OUT ) = 1 C I N D I F F + 1 C I N + 1 C I N 1 C I N D I F F + 1 C I N + 1 C I N + 1 C F = 1 11.5   p F + 1 5.5   p F 1 5.5   p F 1 11.5   p F + 1 11.5   p F 1 5.5   p F + 1 8.2   p F = 0.47
Δ V ( C I N D I F F ) Δ V ( I N - ) = 1 C I N D I F F 1 C I N D I F F + 1 C I N + = 1 11.5   p F 1 11.5   p F + 1 5.5   p F = 0.32
β = Δ V ( I N - ) Δ V ( OUT ) × Δ V ( C I N D I F F ) Δ V ( I N - ) = 0.47 × 0.32 = 0.152 = 1 6 . 57

This stable β suggests that the amplifier now has a signal gain ≥ 6 V/V at high frequency. But careful selection of both CF and RF values can create both a stable amount of feedback and also a low-pass filter of the signal gain, to prevent the increasing 1/β over frequency from creating issues like overshoot. It is easier to achieve both of these conditions when RF is > 10 kΩ.

Design Results

Measurement of this circuit shows that CF = 8.2 pF and RF = 13.7 kΩ were sufficient to both maintain a stable noise-gain = 6.57 V/V and filter overshoot.

GUID-20220329-SS0I-LBJ6-5RLB-TRNWW9ZM4RXR-low.png500 kHz, 2 Vpp Square-Wave Response
Circuit 2 Measurement

Compensation Circuit 3: High-Frequency Load (RISO)

GUID-20220329-SS0I-5HBK-LL0Z-JXRSSGFPGX0F-low.png Circuit 3 Schematic
GUID-20220329-SS0I-KKD2-3M9V-PKFC2GCWXGLZ-low.pngFrequency Response
GUID-20220329-SS0I-W9KL-2DB1-NW2H1B3PVSRF-low.pngNoise-Gain (Amount of Feedback) Stability Analysis

Design Notes

Add a low-resistance load (RISO) for high frequencies. The load forms a resistor divider with the amplifier open-loop output impedance (see the following image), and can attenuate the effective open-loop gain (AOL) of the amplifier to a compensated level. Since the OPA607 has 500 Ω of series output impedance, a 100-Ω load resistor attenuates the AOL to 1/6 (–15.5 dB).

GUID-20220301-SS0I-JJH7-PVGD-0X9LJS2NSRQM-low.png

Alone, a small resistor load burns a lot of power. But for stability purposes, attenuating the AOL is like increasing the noise-gain, and only a high-frequency load is required, such as an output filter. In the noise-gain stability analysis circuit, both the black unloaded AOL and the maroon AOL with an RC filter load are graphed. The olive 2 V/V (6 dB) noise-gain intersects with the maroon loaded AOL at a more stable, 20-dB/decade rate of closure. This compensation technique is helpful for using the OPA607 as a drop-in replacement for unity-gain stable amplifiers where an output filter is present.

Design Steps

The RISO + CL filter bandwidth must be lower than the attenuated bandwidth of the loaded amplifier, because the frequency range above the filter bandwidth and below the loaded amplifier bandwidth is where the compensation is created. Otherwise, the load further decompensates the amplifier without creating a usable lower gain. In the stability analysis for this circuit, the –40 dB/decade slope in the maroon loaded AOL shows that higher gains will be less stable than the compensated low gain when a filter load attenuates the AOL.

In this example circuit, GBWP = 50 MHz and β = 1/2, but attenuation = 1/6. Therefore, the attenuated amplifier bandwidth is 50/12 = 4.2 MHz. For RISO = 100 Ω, CL should be > 380 pF.

G B W P   ×   β   ×   A t t e n u a t i o n   >   1 2 π × R I S O × C L
C L > ( 2 × 6 ) 2 π   ×   100   Ω   ×   50   M H z = 380   p F

Design Results

Measurement of this circuit shows that a RISO = 100 Ω, 470-pF load was sufficient to make the OPA607 stable in a difference configuration with a gain of 1 V/V.

GUID-20220329-SS0I-K6QX-N2SX-G1T65MMCJDBN-low.png500 kHz, 2 Vpp Square-Wave Response
Circuit 3 Measurement

Design Featured Device

OPA607
Supply Range (Vss) 2.2 V to 5.5 V
Gain Bandwidth Product, G = 20 V/V 50 MHz
Decompensated Gain (AV/V) ≥ 6 V/V

Input Capacitance (CIN)

Differential: 11.5 pF

Common-mode: 5.5 pF
Input Range (VCMVR) (V–) to (V+) – 1.1 V
Output Range (Vout) Rail to Rail

Overdrive Recovery Time (tOR)

300 ns

Voltage Noise (eN)

3.8 nV/√(Hz)

Offset Voltage (Vos) ± 120 µV
Quiescent Current (Iq) 900 µA
Input Bias Current (Ib) ± 3 pA
Slew Rate 24 V/µs

Open-loop Output Impedance (Zo)

500 Ω

OPA607

Design Alternative Devices

Decompensated High-Speed Amplifiers
Device Name Gain Bandwidth Decompensated Gain
LMV793, LMV794
LMP7717, LMP7718
88 MHz 10 V/V
SM73302 88 MHz 10 V/V
OPA838 300 MHz 6 V/V
LMH6629 900 MHz 10 V/V
LMH6626 1.5 GHz 10 V/V
OPA818 2.7 GHz 7 V/V
OPA858 5.5 GHz 7 V/V

Design References

Additional Resources