Product details

Architecture FET / CMOS Input, Voltage FB Number of channels (#) 1 Total supply voltage (Min) (+5V=5, +/-5V=10) 2.2 Total supply voltage (Max) (+5V=5, +/-5V=10) 5.5 GBW (Typ) (MHz) 50 BW @ Acl (MHz) 10 Acl, min spec gain (V/V) 6 Slew rate (Typ) (V/us) 24 Vn at flatband (Typ) (nV/rtHz) 3.8 Vn at 1 kHz (Typ) (nV/rtHz) 3.8 Iq per channel (Typ) (mA) 0.9 Vos (offset voltage @ 25 C) (Max) (mV) 0.6 Rail-to-rail In to V-, Out Features Shutdown, Decompensated Rating Catalog Operating temperature range (C) -40 to 125 CMRR (Typ) (dB) 100 Input bias current (Max) (pA) 10 Offset drift (Typ) (uV/C) 0.3 Output current (Typ) (mA) 20 2nd harmonic (dBc) -105 3rd harmonic (dBc) -95 @ MHz 0.02
Architecture FET / CMOS Input, Voltage FB Number of channels (#) 1 Total supply voltage (Min) (+5V=5, +/-5V=10) 2.2 Total supply voltage (Max) (+5V=5, +/-5V=10) 5.5 GBW (Typ) (MHz) 50 BW @ Acl (MHz) 10 Acl, min spec gain (V/V) 6 Slew rate (Typ) (V/us) 24 Vn at flatband (Typ) (nV/rtHz) 3.8 Vn at 1 kHz (Typ) (nV/rtHz) 3.8 Iq per channel (Typ) (mA) 0.9 Vos (offset voltage @ 25 C) (Max) (mV) 0.6 Rail-to-rail In to V-, Out Features Shutdown, Decompensated Rating Catalog Operating temperature range (C) -40 to 125 CMRR (Typ) (dB) 100 Input bias current (Max) (pA) 10 Offset drift (Typ) (uV/C) 0.3 Output current (Typ) (mA) 20 2nd harmonic (dBc) -105 3rd harmonic (dBc) -95 @ MHz 0.02
SOT-23 (DBV) 5 5 mm² 2.9 x 1.6 SOT-SC70 (DCK) 6 4 mm² 2 x 2.1
  • Gain Bandwidth Product (GBW): 50 MHz
  • Quiescent Current: 900 µA (Typical)
  • Broadband Noise: 3.8 nV/√Hz
  • Input Offset Drift: 1.5 µV/°C (Maximum)
  • Offset Voltage: 120 µV (Typical)
  • Input Bias Current: 10 pA (Maximum)
  • Rail-to-Rail Output (RRO)
  • Decompensated, Gain ≥ 6 V/V (Stable)
  • Power Down Current: 1 µA (Maximum)
  • Supply Range: 2.2 V to 5.5 V
  • Gain Bandwidth Product (GBW): 50 MHz
  • Quiescent Current: 900 µA (Typical)
  • Broadband Noise: 3.8 nV/√Hz
  • Input Offset Drift: 1.5 µV/°C (Maximum)
  • Offset Voltage: 120 µV (Typical)
  • Input Bias Current: 10 pA (Maximum)
  • Rail-to-Rail Output (RRO)
  • Decompensated, Gain ≥ 6 V/V (Stable)
  • Power Down Current: 1 µA (Maximum)
  • Supply Range: 2.2 V to 5.5 V

The OPA607 and OPA2607 devices are decompensated, minimum gain of 6 V/V stable, general-purpose CMOS operational amplifier with low noise of 3.8 nV/√ Hz and a GBW of 50 MHz. The low noise and wide bandwidth of the OPAx607 devices make them attractive for general-purpose applications which require a good balance between cost and performance. The high-impedance CMOS inputs make the OPAx607 devices an ideal amplifier to interface with sensors with high output impedance (for example, piezoelectric transducers).

The OPAx607 devices feature a Power Down mode with a maximum quiescent current of less than 1 µA, making the device suitable for use in portable battery-powered applications. The rail-to-rail output (RRO) of the OPAx607 devices can swing up to 8 mV from the supply rails, maximizing dynamic range.

The OPAx607 is optimized for low supply voltage operation as low as 2.2 V (±1.1 V) and up to 5.5 V (±2.75 V), and is specified over the temperature range of –40°C to +125°C.

The OPA607 and OPA2607 devices are decompensated, minimum gain of 6 V/V stable, general-purpose CMOS operational amplifier with low noise of 3.8 nV/√ Hz and a GBW of 50 MHz. The low noise and wide bandwidth of the OPAx607 devices make them attractive for general-purpose applications which require a good balance between cost and performance. The high-impedance CMOS inputs make the OPAx607 devices an ideal amplifier to interface with sensors with high output impedance (for example, piezoelectric transducers).

The OPAx607 devices feature a Power Down mode with a maximum quiescent current of less than 1 µA, making the device suitable for use in portable battery-powered applications. The rail-to-rail output (RRO) of the OPAx607 devices can swing up to 8 mV from the supply rails, maximizing dynamic range.

The OPAx607 is optimized for low supply voltage operation as low as 2.2 V (±1.1 V) and up to 5.5 V (±2.75 V), and is specified over the temperature range of –40°C to +125°C.

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Technical documentation

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Type Title Date
* Data sheet OPAx607 50-MHz, Low-Power, Rail-to-Rail Output CMOS Operational Amplifier for Cost Sensitive Systems datasheet (Rev. J) 16 Apr 2021
Technical article 3 common questions when designing with high-speed amplifiers 17 Jul 2020
User guide DEM-OPA-SC-1A-EVM Evaluation Module 23 Oct 2019
Technical article How to reduce distortion in high-voltage, high-frequency signal generation for AWGs 30 Oct 2018
Technical article What are the advantages of using JFET-input amplifiers in high-speed applications? 19 Jun 2018
Technical article Unique active mux capability combines buffer and switch into one solution 10 Oct 2017
Application note Noise Analysis for High Speed Op Amps (Rev. A) 17 Jan 2005

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

DEM-OPA-SC-1A-EVM — Op amp evaluation module for SC70 package

The DEM-OPA-SC-1A-EVM is a demonstration fixture that helps designers evaluate the operation and performance of TI's high speed, wide bandwidth operational amplifiers. This unpopulated PC board is compatible with products offered in the SC70 (DCK) package using either the 5 pin or 6 pin variants.
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Simulation model

OPA607 TINA-TI Reference Circuit (Rev. C)

SBOMB17C.TSC (1282 KB) - TINA-TI Reference Design
Simulation model

OPA607 Circuit PSPICE Integration (Rev. A)

SBOMB65A.ZIP (71 KB) - PSpice Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Calculation tool

ANALOG-ENGINEER-CALC — Analog engineer's calculator

The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
Calculation tool

VOLT-DIVIDER-CALC — Voltage Divider Determines A Set of Resistors for a Voltage Divider

VOLT-DIVIDER-CALC quickly determines a set of resistors for a voltage divider. This KnowledgeBase Javascript utility can be used to find a set of resistors for a voltage divider to achieve the desired output voltage. This calculator can also be used to design non-inverting attentuation circuits.

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Reference designs

TIDA-060019 — High-speed current shunt monitor reference design

This reference design is a low-side, bidirectional current shunt monitor using high-speed amplifiers. It is intended for applications that could benefit from faster fault detection, single shunt motor control, higher switching frequencies, higher gain, and or reduced general ADC sampling noise. (...)
Reference designs

TIDA-010203 — 4-kW single-phase totem pole PFC reference design with C2000 and GaN

This reference design is a 4-kW CCM totem-pole PFC with F280049/F280025 control card and LMG342x EVM board. This design demos a robust PFC solution, which avoids isolated current sense by putting the controller's ground in the middle of a MOSFET leg. Benefitting from non-isolation, AC current (...)
Package Pins Download
SC70 (DCK) 6 View options
SOT-23 (DBV) 5 View options

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