ADS4225

• Ultralow Power With Single 1.8-V Supply, CMOS
  Output:
  • 183 mW Total Power at 65 MSPS
  • 277 mW Total Power at 125 MSPS
  • 332 mW Total Power at 160 MSPS
• High Dynamic Performance:
  • 88-dBc SFDR at 170 MHz
  • 71.4-dBFS SNR at 170 MHz
• Crosstalk: > 90 dB at 185 MHz
• Programmable Gain up to 6 dB for SNR/SFDR
  Trade-off
• DC Offset Correction
• Output Interface Options:
  • 1.8-V parallel CMOS Interface
  • Double Data Rate (DDR) LVDS With
    Programmable swing:
    • Standard Swing: 350 mV
    • Low Swing: 200 mV
• Supports Low Input Clock Amplitude Down to
  200 mV_PP
• Package: VQFN-64 (9.00 mm × 9.00 mm)

The ADS424x and ADS422x family of devices are low-speed variants of the ADS42xx ultralow-power family of dual-channel, 14-bit/12-bit analog-to-digital converters (ADCs). Innovative design techniques are used to achieve high-dynamic performance, while consuming extremely low power with 1.8-V supply. This topology makes the ADS424x/422x well-suited for multi-carrier, wide-bandwidth communications applications.

The ADS424x/422x have gain options that can be used to improve SFDR performance at lower full-scale input ranges. These devices include a dc offset correction loop that can be used to cancel the ADC offset. Both DDR (double data rate) LVDS and parallel CMOS digital output interfaces are available in a compact VQFN-64 package.

The devices include internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. All devices are specified over the industrial temperature range (–40°C to 85°C).