ADS4225EVM

ADS4225 Dual-Channel, 12-Bit, 125-MSPS Analog-to-Digital Converter Evaluation Module

ADS4225EVM

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Overview

The ADS4225EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments‘ ADS4225 device, an extremely low power dual channel 12-bit 125 MSPS analog to digital converter. The ADC features a configurable parallel DDR LVDS or CMOS outputs. The EVM provides a flexible environment to test the ADS4225 under a variety of clock, input and supply conditions.

The ADS4225EVM also includes Texas Instrument’s new 10 Output Low Jitter Clock Synchronizer and Jitter Cleaner device, the CDCE72010, which can be used to drive the clocking input to the ADS4225. Open sockets are provided for an external VCXO and crystal band pass filter allowing for rapid evaluation of a combined high performance ADC and clocking circuit equivalent to a final system level solution. Alternatively an external clock source can be provided to the EVM and either routed through the CDCE72010 or passed directly to the ADS4225 clock input.

The ADS4225EVM is directly compatible to the TSW1400EVM or TSW1405EVM, TI's high speed LVDS output ADC data capture cards. It is also compatible with Altera and Xilinx FPGA EVMs which have FMC or HSMC connectors, via the appropriate interposer card.

Features
  • Transformer coupled analog input path
  • Amplifier path based on the THS4509
  • Configurable CMOS or DDR LVDS parallel output modes
  • Transformer coupled clock input path
  • CDCE72010 Jitter Clock Synchronizer and Jitter Cleaner clocking circuit
  • DDR LVDS output and capture ability via TSW1400EVM or TSW1405EVM capture card
  • USB controlled for SPI access
  • High-speed ADCs (>10MSPS)
    ADS4225 Dual-Channel, 12-Bit, 125-MSPS Analog-to-Digital Converter (ADC)

     

    Clock generators
    CDCE72010 10 Outputs Low Jitter Clock Synchronizer and Jitter Cleaner
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    Evaluation board

    ADS4225EVM – ADS4225 Evaluation Module

    Evaluation board

    ADS4225EVM-BDL – ADS4225EVM + TSW1400EVM Data Capture / Pattern Generator Bundle

    GUI for evaluation module (EVM)

    ADS42xxx SPI GUI (Rev. B) – SBAC113B.ZIP (129504KB)

    Support software

    TIGAR Support Files – SBAC120.ZIP (262219KB)

    TI's Standard Terms and Conditions for Evaluation Items apply.

    Design files

    ADS42XX_58C28EVM DesignPkg (Rev. B) SLAC459B.ZIP (6548 KB)

    Technical documentation

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    Type Title Date
    More literature ADS4225EVM EU Declaration of Conformity (DoC) Jan. 02, 2019
    Datasheet ADS42xx Dual-Channel, 14-/12-Bit, 160/125/65 MSPS Ultralow-Power ADC datasheet (Rev. D) Oct. 27, 2015
    User guide ADS42xx EVM User’s Guide (Rev. A) Jun. 21, 2013
    User guide Interfacing Altera FPGAs to ADS4249 and DAC3482 (TIDA-00069 Reference Guide) Jul. 10, 2012

    Related design resources

    Hardware development

    EVALUATION BOARD
    TSW1400EVMData Capture/Pattern Generator: Data Converter Evaluation Module With 8 LVDS Lanes up to 1.5Gbps
    TSW1405EVMData Capture/Pattern Generator: Data Converter Evaluation Module With 8 LVDS Lanes up to 1.0Gbps
    DAUGHTER CARD
    HSMC-ADC-BRIDGEHigh Speed ADC to HSMC (Altera) Header Adaptor Card
    INTERFACE ADAPTER
    FMC-ADC-ADAPTERHigh Speed ADC to FMC (Xilinx) Header Adapter Card

    Software development

    SUPPORT SOFTWARE
    DATACONVERTERPRO-SWHigh-speed data converter pro software

    Support & training

    TI E2E™ forums with technical support from TI engineers

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