Home Logic & voltage translation Flip-flops, latches & registers Counters
Home
Logic & voltage translation
Flip-flops, latches & registers
Counters

CD54HC4017

ACTIVE

High Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs

Order now
Data sheet

CD54HC4017

ACTIVE
Data sheet Order now

Product details

Function Counter Bits (#) 10 Technology family HC Input type Standard CMOS Output type Push-Pull Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -55 to 125 Rating Military
Function Counter Bits (#) 10 Technology family HC Input type Standard CMOS Output type Push-Pull Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -55 to 125 Rating Military
CDIP (J) 16 135.3552 mm² (— mm × — mm)
  • 2-V to 6-V Operation
  • Fully Static Operation
  • Buffered Inputs
  • Common Reset
  • Positive-Edge Clocking
  • Balanced Propagation Delay and Transition Times
  • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5 V
  • Packaged in Ceramic (F) DIP Package and Also Available in Chip Form (H)
  • 2-V to 6-V Operation
  • Fully Static Operation
  • Buffered Inputs
  • Common Reset
  • Positive-Edge Clocking
  • Balanced Propagation Delay and Transition Times
  • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5 V
  • Packaged in Ceramic (F) DIP Package and Also Available in Chip Form (H)

The CD54HC4017 is a high-speed silicon-gate CMOS 5-stage Johnson counter with ten decoded outputs. Each decoded output normally is low and sequentially goes high on the low-to-high transition of the clock (CP) input. Each output stays high for one clock period of the ten-clock-period cycle. The terminal count (TC) output transitions low to high after output ten (9) goes low, and can be used in conjunction with the clock enable (CE\) input to cascade several stages. CE\ disables counting when in the high state. The master reset (MR) input, when taken high, sets all the decoded outputs, except 0, to low.

The CD54HC4017 is characterized for operation over the full military temperature range of -55°C to 125°C.

The CD54HC4017 is a high-speed silicon-gate CMOS 5-stage Johnson counter with ten decoded outputs. Each decoded output normally is low and sequentially goes high on the low-to-high transition of the clock (CP) input. Each output stays high for one clock period of the ten-clock-period cycle. The terminal count (TC) output transitions low to high after output ten (9) goes low, and can be used in conjunction with the clock enable (CE\) input to cascade several stages. CE\ disables counting when in the high state. The master reset (MR) input, when taken high, sets all the decoded outputs, except 0, to low.

The CD54HC4017 is characterized for operation over the full military temperature range of -55°C to 125°C.
filter Find other Counters
Download

Technical documentation

No results found. Please clear your search and try again.
View all 2
Top documentation Type Title Format options Date
* Data sheet Decade Counter/Divider With Ten Decoded Outputs datasheet Mar 19, 1999
* SMD CD54HC4017 SMD 8601101EA Jun 21, 2016

Ordering & quality

Support & training

TI E2E™ forums with technical support from TI engineers

View all forum topics

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​