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Inverting buffers & drivers

CD74HC14

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6-ch, 2-V to 6-V inverters with Schmitt-Trigger inputs

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Data sheet
6-ch, 2-V to 6-V inverters with Schmitt-Trigger inputs

CD74HC14

ACTIVE
Data sheet Order now

Product details

Technology Family HC Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 6 Number of channels (#) 6 IOL (Max) (mA) 5.2 IOH (Max) (mA) -5.2 ICC (Max) (uA) 40 Input type Schmitt-Trigger Output type Push-Pull Features Balanced outputs, High speed (tpd 10-50ns), Input clamp diode Rating Catalog
Technology Family HC Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 6 Number of channels (#) 6 IOL (Max) (mA) 5.2 IOH (Max) (mA) -5.2 ICC (Max) (uA) 40 Input type Schmitt-Trigger Output type Push-Pull Features Balanced outputs, High speed (tpd 10-50ns), Input clamp diode Rating Catalog
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PDIP (N) 14 181 mm² 19.3 x 9.4 SOIC (D) 14 52 mm² 8.65 x 6 TSSOP (PW) 14 32 mm² 5 x 6.4
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  • Buffered inputs
  • Wide operating voltage range: 2 V to 6 V
  • Wide operating temperature range: -55°C to +125°C
  • Supports fanout up to 10 LSTTL loads
  • Significant power reduction compared to LSTTL logic ICs
  • Buffered inputs
  • Wide operating voltage range: 2 V to 6 V
  • Wide operating temperature range: -55°C to +125°C
  • Supports fanout up to 10 LSTTL loads
  • Significant power reduction compared to LSTTL logic ICs
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This device contains six independent inverters with Schmitt-trigger inputs. Each gate performs the Boolean function Y =  A in positive logic.

This device contains six independent inverters with Schmitt-trigger inputs. Each gate performs the Boolean function Y =  A in positive logic.

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Technical documentation

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Type Title Date
* Data sheet CDx4HC14 Hex Inverters with Schmitt-Trigger Inputs datasheet (Rev. G) 12 May 2021
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
Application note Understanding Schmitt Triggers 21 Sep 2011
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
More literature Logic Cross-Reference (Rev. A) 07 Oct 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 01 May 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Generic Logic EVM Supporting 14 through 24 Pin PW, DB, D, DW, NS, DYY, and DGV Packages

This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, DYY or DGV package in a 14 to 24 pin count.

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Simulation model

CD74HC14 Behavioral SPICE Model

SCHM075.ZIP (7 KB) - PSpice Model
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Reference designs

TIDA-00826 — 50-Ohm 2-GHz Oscilloscope Front-end Reference Design

This reference design is part of an analog front-end for 50Ω-input oscilloscope application. System designers can readily use this evaluation platform to process input signals from DC to 2 GHz in both frequency-domain and time-domain applications.
document-pdfAcrobat Schematic
Package Pins Download
PDIP (N) 14 View options
SOIC (D) 14 View options
TSSOP (PW) 14 View options

Ordering & quality

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