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CD74HC4316

ACTIVE

5V, 1:1 (SPST), 4-channel, analog switch, level translation

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Data sheet

CD74HC4316

ACTIVE
Data sheet Order now

Product details

Configuration 1:1 SPST Number of channels 4 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Power supply voltage - dual (V) +/-2.5, +/-5 Protocols Analog Ron (typ) (Ω) 30 CON (typ) (pF) 5 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 200 Operating temperature range (°C) -55 to 125 Features Break-before-make Input/output continuous current (max) (A) 0.025 Rating Catalog Drain supply voltage (max) (V) 6 Negative rail supply voltage (max) (V) 0
Configuration 1:1 SPST Number of channels 4 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Power supply voltage - dual (V) +/-2.5, +/-5 Protocols Analog Ron (typ) (Ω) 30 CON (typ) (pF) 5 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 200 Operating temperature range (°C) -55 to 125 Features Break-before-make Input/output continuous current (max) (A) 0.025 Rating Catalog Drain supply voltage (max) (V) 6 Negative rail supply voltage (max) (V) 0
SOIC (D) 16 59.4 mm² (9.9 mm × 6 mm) TSSOP (PW) 16 32 mm² (5 mm × 6.4 mm) SOP (NS) 16 79.56 mm² (10.2 mm × 7.8 mm) PDIP (N) 16 181.42 mm² (19.3 mm × 9.4 mm)
  • Wide analog-input-voltage range:

    VCC - VEE: 0V to 10V

  • Low ON resistance:
    • 45Ω (typical): VCC = 4.5V
    • 35Ω (typical): VCC = 6V
    • 30Ω (typical): VCC – VEE = 9V
  • Fast switching and propagation delay times
  • Low OFF leakage current
  • Built-in break-before-make switching
  • Logic-level translation to enable 5V logic to accommodate ±5 V analog signals
  • Wide operating temperature range: -55°C to 125°C
  • HC types:
    • 2V to 10V operation
    • High noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT types:
    • Direct LSTTL input logic compatibility, VIL= 0.8V (maximum), VIH = 2V (minimum)
    • CMOS input compatibility, II ≤ 1 µA at VOL, VOH
  • Wide analog-input-voltage range:

    VCC - VEE: 0V to 10V

  • Low ON resistance:
    • 45Ω (typical): VCC = 4.5V
    • 35Ω (typical): VCC = 6V
    • 30Ω (typical): VCC – VEE = 9V
  • Fast switching and propagation delay times
  • Low OFF leakage current
  • Built-in break-before-make switching
  • Logic-level translation to enable 5V logic to accommodate ±5 V analog signals
  • Wide operating temperature range: -55°C to 125°C
  • HC types:
    • 2V to 10V operation
    • High noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT types:
    • Direct LSTTL input logic compatibility, VIL= 0.8V (maximum), VIH = 2V (minimum)
    • CMOS input compatibility, II ≤ 1 µA at VOL, VOH

The ’HC4316 and CD74HCT4316 contain four independent digitally controlled analog switches that use silicon-gate CMOS technology to achieve operating speeds similar to LSTTL with the low power consumption of standard CMOS integrated circuits.

In addition these devices contain logic-level translation circuits that provide for analog signal switching of voltages between ±5V via 5V logic. Each switch is turned on by a high-level voltage on its select input (S) when the common Enable (E) is Low. A High E disables all switches. The digital inputs can swing between VCC and GND; the analog inputs/outputs can swing between VCC as a positive limit and VEE as a negative limit. Voltage ranges are shown in Figure 13-1 and Figure 13-2.

The ’HC4316 and CD74HCT4316 contain four independent digitally controlled analog switches that use silicon-gate CMOS technology to achieve operating speeds similar to LSTTL with the low power consumption of standard CMOS integrated circuits.

In addition these devices contain logic-level translation circuits that provide for analog signal switching of voltages between ±5V via 5V logic. Each switch is turned on by a high-level voltage on its select input (S) when the common Enable (E) is Low. A High E disables all switches. The digital inputs can swing between VCC and GND; the analog inputs/outputs can swing between VCC as a positive limit and VEE as a negative limit. Voltage ranges are shown in Figure 13-1 and Figure 13-2.
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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet CDx4HCx4316 High-Speed CMOS Logic Quad Analog Switch with Level Translation datasheet (Rev. E) PDF | HTML Jul 16, 2024
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML Jun 2, 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML Dec 1, 2021

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Interface adapter

LEADED-ADAPTER1 — Surface mount to DIP header adapter for quick testing of TI's 5, 8, 10, 16 & 24-pin leaded packages

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

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SOIC (D) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian
SOP (NS) 16 Ultra Librarian
PDIP (N) 16 Ultra Librarian
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