Product details

Number of channels (#) 2 Total supply voltage (Max) (+5V=5, +/-5V=10) 36 Total supply voltage (Min) (+5V=5, +/-5V=10) 10 Rail-to-rail In to V+ GBW (Typ) (MHz) 4 Slew rate (Typ) (V/us) 13 Vos (offset voltage @ 25 C) (Max) (mV) 10 Iq per channel (Typ) (mA) 1.8 Vn at 1 kHz (Typ) (nV/rtHz) 16 Rating Catalog Operating temperature range (C) 0 to 70 Offset drift (Typ) (uV/C) 10 Features Input bias current (Max) (pA) 200 CMRR (Typ) (dB) 100 Output current (Typ) (mA) 20 Architecture FET
Number of channels (#) 2 Total supply voltage (Max) (+5V=5, +/-5V=10) 36 Total supply voltage (Min) (+5V=5, +/-5V=10) 10 Rail-to-rail In to V+ GBW (Typ) (MHz) 4 Slew rate (Typ) (V/us) 13 Vos (offset voltage @ 25 C) (Max) (mV) 10 Iq per channel (Typ) (mA) 1.8 Vn at 1 kHz (Typ) (nV/rtHz) 16 Rating Catalog Operating temperature range (C) 0 to 70 Offset drift (Typ) (uV/C) 10 Features Input bias current (Max) (pA) 200 CMRR (Typ) (dB) 100 Output current (Typ) (mA) 20 Architecture FET
PDIP (P) 8 93 mm² 9.81 x 9.43 SOIC (D) 8 SOIC (D) 8 19 mm² 4.9 x 3.9
  • Internally Trimmed Offset Voltage: 10 mV
  • Low Input Bias Current: 50pA
  • Low Input Noise Voltage: 25 nV/√Hz
  • Low Input Noise Current: 0.01 pA/√Hz
  • Wide Gain Bandwidth: 4 MHz
  • High Slew Rate: 13 V/μs
  • Low Supply Current: 3.6 mA
  • High Input Impedance: 1012Ω
  • Low Total Harmonic Distortion : ≤0.02%
  • Low 1/f Noise Corner: 50 Hz
  • Fast Settling Time to 0.01%: 2 μs

All trademarks are the property of their respective owners.

  • Internally Trimmed Offset Voltage: 10 mV
  • Low Input Bias Current: 50pA
  • Low Input Noise Voltage: 25 nV/√Hz
  • Low Input Noise Current: 0.01 pA/√Hz
  • Wide Gain Bandwidth: 4 MHz
  • High Slew Rate: 13 V/μs
  • Low Supply Current: 3.6 mA
  • High Input Impedance: 1012Ω
  • Low Total Harmonic Distortion : ≤0.02%
  • Low 1/f Noise Corner: 50 Hz
  • Fast Settling Time to 0.01%: 2 μs

All trademarks are the property of their respective owners.

These devices are low cost, high speed, dual JFET input operational amplifiers with an internally trimmed input offset voltage (BI-FET II technology). They require low supply current yet maintain a large gain bandwidth product and fast slew rate. In addition, well matched high voltage JFET input devices provide very low input bias and offset currents. The LF353-N is pin compatible with the standard LM1558 allowing designers to immediately upgrade the overall performance of existing LM1558 and LM358 designs.

These amplifiers may be used in applications such as high speed integrators, fast D/A converters, sample and hold circuits and many other circuits requiring low input offset voltage, low input bias current, high input impedance, high slew rate and wide bandwidth. The devices also exhibit low noise and offset voltage drift.

These devices are low cost, high speed, dual JFET input operational amplifiers with an internally trimmed input offset voltage (BI-FET II technology). They require low supply current yet maintain a large gain bandwidth product and fast slew rate. In addition, well matched high voltage JFET input devices provide very low input bias and offset currents. The LF353-N is pin compatible with the standard LM1558 allowing designers to immediately upgrade the overall performance of existing LM1558 and LM358 designs.

These amplifiers may be used in applications such as high speed integrators, fast D/A converters, sample and hold circuits and many other circuits requiring low input offset voltage, low input bias current, high input impedance, high slew rate and wide bandwidth. The devices also exhibit low noise and offset voltage drift.

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LF353 ACTIVE Dual, 36-V, 3-MHz, high slew rate (13-V/µs), In to V+, JFET-input operational amplifier This is the same device optimized for cost-sensitive applications
TL072H ACTIVE Dual, 40-V, 5-MHz, 4-mV offset voltage, 20-V/µs, In to V+ op amp with -40°C to 125°C operation Wider temperature range (-40°C to +125°C), higher slew rate (20 V/us), wider voltage range (4.5 V to 40 V) and improved offset voltage and drift
TL082H ACTIVE Dual, 40-V, 5.25-MHz, 4-mV offset voltage, 20-V/µs, In to V+ op amp with -40°C to 125°C operation Wider temperature range (-40°C to 125°C), higher slew rate (20V/us), wider voltage range (4.5 V to 40 V) and improved offset voltage drift

Technical documentation

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Type Title Date
* Data sheet LF353 Wide Bandwidth Dual JFET Input Operational Amplifier datasheet (Rev. F) 25 Mar 2013
Technical article What is an op amp? 21 Jan 2020
Technical article How to lay out a PCB for high-performance, low-side current-sensing designs 06 Feb 2018
Technical article Low-side current sensing for high-performance cost-sensitive applications 22 Jan 2018
Technical article Voltage and current sensing in HEV/EV applications 22 Nov 2017
E-book The Signal e-book: A compendium of blog posts on op amp design topics 28 Mar 2017
Application note AN-256 Circuitry for Inexpensive Relative Humidity Measurement (Rev. B) 06 May 2013
Application note AN-262 Applying Dual and Quad FET Op Amps (Rev. B) 06 May 2013
Application note AN-263 Sine Wave Generation Techniques (Rev. C) 22 Apr 2013
Application note AN-447 Protection Schemes for BI-FET Amplifiers and Switches 02 May 2004
Application note Get More Power Out of Dual or Quad Op-Amps 02 Oct 2002

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

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Simulation model

LF353-N PSPICE Model LF353-N PSPICE Model

Simulation tool

PSPICE-FOR-TI PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Calculation tool

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Design tool

CIRCUIT060013 Inverting amplifier with T-network feedback circuit

This design inverts the input signal, VIN, and applies a signal gain of 1000 V/V or 60 dB. The inverting amplifier with T-feedback network can be used to obtain a high gain without a small value for R4 or very large values for the feedback resistors.
Design tool

CIRCUIT060015 Adjustable reference voltage circuit

This circuit combines an inverting and non-inverting amplifier to make a reference voltage adjustable from the negative of the input voltage up to the input voltage. Gain can be added to increase the maximum negative reference level.
Design tool

CIRCUIT060074 High-side current sensing with comparator circuit

This high-side, current sensing solution uses one comparator with a rail-to-rail input common mode range to create an over-current alert (OC-Alert) signal at the comparator output (COMP OUT) if the load current rises above 1 A. The OC-Alert signal in this implementation is active low. So when the (...)
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