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SN54ABT273

ACTIVE

Octal Edge-Triggered D-type Flip-Flops With Clear

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Data sheet

SN54ABT273

ACTIVE
Data sheet Order now

Product details

Number of channels 8 Technology family ABT Input type TTL-Compatible CMOS Output type Push-Pull Clock frequency (max) (MHz) 150 IOL (max) (mA) 48 IOH (max) (mA) -24 Supply current (max) (µA) 30000 Features Partial power down (Ioff), Very high speed (tpd 5-10ns) Operating temperature range (°C) -55 to 125 Rating Military
Number of channels 8 Technology family ABT Input type TTL-Compatible CMOS Output type Push-Pull Clock frequency (max) (MHz) 150 IOL (max) (mA) 48 IOH (max) (mA) -24 Supply current (max) (µA) 30000 Features Partial power down (Ioff), Very high speed (tpd 5-10ns) Operating temperature range (°C) -55 to 125 Rating Military
LCCC (FK) 20 79.0321 mm² (— mm × — mm) CDIP (J) 20 167.464 mm² (— mm × — mm) CFP (W) 20 90.5828 mm² (— mm × — mm)
  • State-of-the-Art EPIC-IIBTM BiCMOS Design Significantly Reduces Power Dissipation
  • Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
  • Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
  • High-Drive Outputs (-32-mA IOH, 64-mA IOL)
  • Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Plastic (N) and Ceramic (J) DIPs, and Ceramic Flat (W) Package

 

EPIC-IIB is a trademark of Texas Instruments Incorporated.
  • State-of-the-Art EPIC-IIBTM BiCMOS Design Significantly Reduces Power Dissipation
  • Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
  • Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
  • High-Drive Outputs (-32-mA IOH, 64-mA IOL)
  • Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Plastic (N) and Ceramic (J) DIPs, and Ceramic Flat (W) Package

 

EPIC-IIB is a trademark of Texas Instruments Incorporated.

The 'ABT273 are 8-bit positive-edge-triggered D-type flip-flops with a direct clear () input. They are particularly suitable for implementing buffer and storage registers, shift registers, and pattern generators.

Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D input signal has no effect at the output.

The SN54ABT273 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT273 is characterized for operation from -40°C to 85°C.

 

 

The 'ABT273 are 8-bit positive-edge-triggered D-type flip-flops with a direct clear () input. They are particularly suitable for implementing buffer and storage registers, shift registers, and pattern generators.

Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D input signal has no effect at the output.

The SN54ABT273 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT273 is characterized for operation from -40°C to 85°C.

 

 
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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet Octal Edge-Triggered D-Type Flip-Flops With Clear datasheet (Rev. B) Jan 1, 1997
* SMD SN54ABT273 SMD 5962-93217 Jun 21, 2016
Application note Power-Up Behavior of Clocked Devices (Rev. B) PDF | HTML Dec 15, 2022

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Package Pins CAD symbols, footprints & 3D models
LCCC (FK) 20 Ultra Librarian
CDIP (J) 20 Ultra Librarian
CFP (W) 20 Ultra Librarian
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