CD74HCT273 High Speed CMOS Logic Octal D-Type Flip-Flop with Reset | TI.com

CD74HCT273
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High Speed CMOS Logic Octal D-Type Flip-Flop with Reset

High Speed CMOS Logic Octal D-Type Flip-Flop with Reset - CD74HCT273
Datasheet
 

Description

The ’HC273 and ’HCT273 high speed octal D-Type flip-flops with a direct clear input are manufactured with silicon-gate CMOS technology. They possess the low power consumption of standard CMOS integrated circuits.

Information at the D inputis transferred to the Q outputs on the positive-going edge of the clock pulse. All eight flip-flops are controlled by a common clock (CP) and a common reset (MR). Resetting is accomplished by a low voltage level independent of the clock. All eight Q outputs are reset to a logic 0.

Features

  • Common Clock and Asynchronous Master Reset
  • Positive Edge Triggering
  • Buffered Inputs
  • Fanout (Over Temperature Range)
    • Standard Outputs...10 LSTTL Loads
    • Bus Driver Outputs...15 LSTTL Loads
  • Wide Operating Temperature Range...–55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH

Data sheet acquired from Harris Semiconductor

Parametrics

Compare all products in D-type flip-flop Email Download to Excel
Part number Order Technology Family Input type Output type VCC (Min) (V) VCC (Max) (V) IOL (Max) (mA) IOH (Max) (mA) Rating Package Group
CD74HCT273 Order now HCT     TTL     CMOS     4.5     5.5     4     -4     Catalog     PDIP | 20
SOIC | 20    
CD54HCT273 Samples not available HCT     TTL     CMOS     4.5     5.5     4     -4     Military     CDIP | 20