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Inverting buffers & drivers

SN54HCT240

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Military 8-ch, 4.5-V to 5.5-V inverters with TTL-compatible CMOS inputs and 3-state outputs

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Data sheet

SN54HCT240

ACTIVE
Data sheet Order now

Product details

Technology family HCT Number of channels 8 IOL (max) (mA) 6 IOH (max) (mA) -6 Supply current (max) (µA) 80 Input type TTL-Compatible CMOS Output type 3-State Features Balanced outputs, Very high speed (tpd 5-10ns) Rating Military Operating temperature range (°C) -55 to 125
Technology family HCT Number of channels 8 IOL (max) (mA) 6 IOH (max) (mA) -6 Supply current (max) (µA) 80 Input type TTL-Compatible CMOS Output type 3-State Features Balanced outputs, Very high speed (tpd 5-10ns) Rating Military Operating temperature range (°C) -55 to 125
CDIP (J) 20 167.464 mm² (— mm × — mm) LCCC (FK) 20 79.0321 mm² (— mm × — mm)
  • Operating voltage range of 4.5V to 5.5V
  • High-current outputs drive up to 15 LSTTL loads
  • Low power consumption, 80µA max ICC
  • Typical tpd = 12 ns
  • ±6mA output drive at 5V
  • Low input current of 1µA max
  • Inputs are TTL-voltage compatible
  • 3-state outputs drive bus lines or buffer memory address registers
  • Operating voltage range of 4.5V to 5.5V
  • High-current outputs drive up to 15 LSTTL loads
  • Low power consumption, 80µA max ICC
  • Typical tpd = 12 ns
  • ±6mA output drive at 5V
  • Low input current of 1µA max
  • Inputs are TTL-voltage compatible
  • 3-state outputs drive bus lines or buffer memory address registers

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HCT240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HCT240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
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SN74AHCT240 ACTIVE 8-ch, 4.5-V to 5.5-V inverters with TTL-compatible CMOS inputs Voltage range 4.5V to 5.5V, average propagation delay 9ns, average drive strength 8mA

Technical documentation

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Top documentation Type Title Format options Date
* Data sheet SNx4HCT240 Octal Buffers and Line Drivers With 3-State Outputs datasheet (Rev. H) PDF | HTML Aug 22, 2024
* SMD SN54HCT240 SMD 85505012A Jun 21, 2016

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