SN74CBT16861

ACTIVE

Product details

Protocols Analog Configuration 1:1 SPST Number of channels 20 Bandwidth (MHz) 200 Ron (typ) (mΩ) 5000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 5.5 OFF-state leakage current (max) (µA) 1 Ron (max) (mΩ) 22000 VIH (min) (V) 2 VIL (max) (V) 0.8 Rating Catalog
Protocols Analog Configuration 1:1 SPST Number of channels 20 Bandwidth (MHz) 200 Ron (typ) (mΩ) 5000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 5.5 OFF-state leakage current (max) (µA) 1 Ron (max) (mΩ) 22000 VIH (min) (V) 2 VIL (max) (V) 0.8 Rating Catalog
SSOP (DL) 48 164.358 mm² (15.88 mm × 10.35 mm) TVSOP (DGV) 48 62.08 mm² (9.7 mm × 6.4 mm) TSSOP (DGG) 48 101.25 mm² (12.5 mm × 8.1 mm)
  • Member of Texas Instruments' WidebusTM Family
  • 5- Switch Connection Between Two Ports
  • TTL-Compatible Input Levels
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

    Widebus is a trademark of Texas Instruments.

  • Member of Texas Instruments' WidebusTM Family
  • 5- Switch Connection Between Two Ports
  • TTL-Compatible Input Levels
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

    Widebus is a trademark of Texas Instruments.

The SN74CBT16861 provides 20 bits of high-speed TTL-compatible bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The device is organized as one dual 10-bit switch with separate output-enable (OE\) input. When OE\ is low, the switch is on, and port A is connected to port B. When OE\ is high, the switch is open, and the high-impedance state exists between the two ports.

The SN74CBT16861 provides 20 bits of high-speed TTL-compatible bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The device is organized as one dual 10-bit switch with separate output-enable (OE\) input. When OE\ is low, the switch is on, and port A is connected to port B. When OE\ is high, the switch is open, and the high-impedance state exists between the two ports.

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* Data sheet 20-Bit FET Bus Switch datasheet (Rev. C) Oct 23, 2000

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