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SN74HC05

ACTIVE

6-ch, 2V to 6V inverters with open-drain outputs

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Data sheet

SN74HC05

ACTIVE
Data sheet Order now

Product details

Technology family HC Number of channels 6 IOL (max) (mA) 6 IOH (max) (mA) 0 Supply current (max) (µA) 20 Input type Standard CMOS Output type Open-drain Features Balanced outputs, Input clamp diode, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
Technology family HC Number of channels 6 IOL (max) (mA) 6 IOH (max) (mA) 0 Supply current (max) (µA) 20 Input type Standard CMOS Output type Open-drain Features Balanced outputs, Input clamp diode, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
TSSOP (PW) 14 32 mm² (5 mm × 6.4 mm) PDIP (N) 14 181.42 mm² (19.3 mm × 9.4 mm) SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm) SOP (NS) 14 79.56 mm² (10.2 mm × 7.8 mm)
  • Buffered inputs
  • Wide operating voltage range: 2 V to 6 V
  • Wide operating temperature range: –40°C to +85°C
  • Supports fanout up to 10 LSTTL loads
  • Significant power reduction compared to LSTTL logic ICs
  • Buffered inputs
  • Wide operating voltage range: 2 V to 6 V
  • Wide operating temperature range: –40°C to +85°C
  • Supports fanout up to 10 LSTTL loads
  • Significant power reduction compared to LSTTL logic ICs

This device contains six independent inverters with open-drain outputs. Each gate performs the Boolean function Y =  A in positive logic.

This device contains six independent inverters with open-drain outputs. Each gate performs the Boolean function Y =  A in positive logic.
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Technical documentation

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* Data sheet SNx4HC05 Hex Inverters with Open-Drain Outputs datasheet (Rev. F) PDF | HTML Apr 30, 2021

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
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Simulation model

SN74HC05 Behavioral SPICE Model

SCLM230.ZIP (7 KB) - PSpice model
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
TSSOP (PW) 14 Ultra Librarian
PDIP (N) 14 Ultra Librarian
SOIC (D) 14 Ultra Librarian
SOP (NS) 14 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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