Product details

Number of channels (#) 8 Technology Family HCS Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 6 Input type Schmitt-Trigger Output type Push-Pull Clock Frequency (Max) (MHz) 135 IOL (Max) (mA) 7.8 IOH (Max) (mA) -7.8 ICC (Max) (uA) 2 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode
Number of channels (#) 8 Technology Family HCS Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 6 Input type Schmitt-Trigger Output type Push-Pull Clock Frequency (Max) (MHz) 135 IOL (Max) (mA) 7.8 IOH (Max) (mA) -7.8 ICC (Max) (uA) 2 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode
TSSOP (PW) 20 29 mm² 6.5 x 4.4 VQFN (RKS) 20 11 mm² 4.5 x 2.5
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • ±7.8-mA output drive at 6 V
  • Extended ambient temperature range: –40°C to +125°C, TA
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • ±7.8-mA output drive at 6 V
  • Extended ambient temperature range: –40°C to +125°C, TA

The SN74HCS273 device are octal positive-edge-triggered D-type flip-flops with Schmitt-trigger inputs, shared direct active low clear (CLR) input and clock (CLK).

The SN74HCS273 device are octal positive-edge-triggered D-type flip-flops with Schmitt-trigger inputs, shared direct active low clear (CLR) input and clock (CLK).

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Technical documentation

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* Data sheet SN74HCS273 Octal D-Type Flip-Flop with Schmitt-Trigger Inputs and Asynchronous Clear datasheet (Rev. B) PDF | HTML 05 Oct 2021

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Generic Logic EVM Supporting 14 through 24 Pin PW, DB, D, DW, NS, DYY, and DGV Packages

This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, DYY or DGV package in a 14 to 24 pin count.

User guide: PDF | HTML
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Simulation model

IBIS Model for SN74HCS273, SN74HCS273-Q1

SCLM337.ZIP (51 KB) - IBIS Model
Package Pins Download
TSSOP (PW) 20 View options
VQFN (RKS) 20 View options

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