Product details

Technology family LS Supply voltage (min) (V) 4.75 Supply voltage (max) (V) 5.25 Number of channels 4 Inputs per channel 2 IOL (max) (mA) 0.8 IOH (max) (mA) -16 Input type Bipolar Output type Push-Pull Features High speed (tpd 10- 50ns) Data rate (max) (Mbps) 28 Rating Catalog Operating temperature range (°C) 0 to 70
Technology family LS Supply voltage (min) (V) 4.75 Supply voltage (max) (V) 5.25 Number of channels 4 Inputs per channel 2 IOL (max) (mA) 0.8 IOH (max) (mA) -16 Input type Bipolar Output type Push-Pull Features High speed (tpd 10- 50ns) Data rate (max) (Mbps) 28 Rating Catalog Operating temperature range (°C) 0 to 70
PDIP (N) 14 181.42 mm² 19.3 x 9.4 SOIC (D) 14 51.9 mm² 8.65 x 6 SOP (NS) 14 79.56 mm² 10.2 x 7.8 SSOP (DB) 14 48.36 mm² 6.2 x 7.8
  • Package Options Include Plastic “Small Outline" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs
  • Dependable Texas Instruments Quality and Reliability

 

  • Package Options Include Plastic “Small Outline" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs
  • Dependable Texas Instruments Quality and Reliability

 

These devices contain four independent 2-input OR gates.

The SN5432, SN54LS32 and SN54S32 are characterized for operation over the full military range of -55°C to 125°C. The SN7432, SN74LS32 and SN74S32 are characterized for operation from 0°C to 70°C.

 

These devices contain four independent 2-input OR gates.

The SN5432, SN54LS32 and SN54S32 are characterized for operation over the full military range of -55°C to 125°C. The SN7432, SN74LS32 and SN74S32 are characterized for operation from 0°C to 70°C.

 

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Technical documentation

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Type Title Date
* Data sheet Quadruple 2-Input Positive-OR Gates datasheet 01 Mar 1988
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Designing with the SN54/74LS123 (Rev. A) 01 Mar 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Generic Logic EVM Supporting 14 through 24 Pin PW, DB, D, DW, NS, DYY, and DGV Packages

This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, DYY or DGV package in a 14 to 24 pin count.

User guide: PDF | HTML
Not available on TI.com
Simulation model

SN74LS32 Behavioral SPICE Model

SDLM037.ZIP (7 KB) - PSpice Model
Simulation model

SN74LS32 IBIS Model (Rev. B)

SDLM006B.ZIP (6 KB) - IBIS Model
Package Pins Download
PDIP (N) 14 View options
SOIC (D) 14 View options
SOP (NS) 14 View options
SSOP (DB) 14 View options

Ordering & quality

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