The SN74LVC1G86 device performs the Boolean function Y = AB + A B in positive logic. This single 2-input exclusive-OR gate is designed for operation from 1.65V to 5.5V VCC.
If the input is low, the other input is reproduced in true form at the output. If the input is high, the signal on the other input is reproduced inverted at the output. This device has low power consumption with maximum tpd of 4ns at 3.3V and 15pF capacitive load. The maximum output drive is ±32mA at 4.5V and ±24mA at 3.3V.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current back flow through the device when it is powered down.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | SN74LVC1G86 Single 2-Input Exclusive-OR Gate datasheet (Rev. R) | PDF | HTML | Aug 13, 2026 |
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