Home Amplifiers Comparators
Home
Amplifiers
Comparators
NEW

TLV6722

ACTIVE

Octal Small Form Factor Pluggable, Dual channel Comparator

Order now
Data sheet

TLV6722

ACTIVE
Data sheet Order now

Product details

Number of channels 2 Output type Open-drain, Push-Pull Propagation delay time (µs) 0.6 Vs (max) (V) 3.465 Vs (min) (V) 3.135 Rating Catalog Features Hysteresis, Internal Reference Iq per channel (typ) (mA) 0.00195 Rail-to-rail In Operating temperature range (°C) -25 to 105 VICR (max) (V) 3.465 VICR (min) (V) 0
Number of channels 2 Output type Open-drain, Push-Pull Propagation delay time (µs) 0.6 Vs (max) (V) 3.465 Vs (min) (V) 3.135 Rating Catalog Features Hysteresis, Internal Reference Iq per channel (typ) (mA) 0.00195 Rail-to-rail In Operating temperature range (°C) -25 to 105 VICR (max) (V) 3.465 VICR (min) (V) 0
DSBGA (YBJ) 9 1.44 mm² 1.2 x 1.2
  • Compliant with OSFP and OSFP-XD MSAs
  • Precision integrated resistors
  • Integrated reference
  • Dual comparators
    • M_RSTn: Open-drain output
    • M_LPWn: Push-pull output
    • Internal hysteresis
  • Integrated clock buffer (TLV6723 and TLV6724)
  • Known start-up conditions
  • Separate host and module supplies:
    • H_VCC: 3.135V to 3.465V
    • M_VCC: 1.1V to H_VCC
  • -25°C to 105°C operating temperature range
  • Small size package:
    • 1.2mm x 1.2mm DSBGA-9 (YBJ)
  • Compliant with OSFP and OSFP-XD MSAs
  • Precision integrated resistors
  • Integrated reference
  • Dual comparators
    • M_RSTn: Open-drain output
    • M_LPWn: Push-pull output
    • Internal hysteresis
  • Integrated clock buffer (TLV6723 and TLV6724)
  • Known start-up conditions
  • Separate host and module supplies:
    • H_VCC: 3.135V to 3.465V
    • M_VCC: 1.1V to H_VCC
  • -25°C to 105°C operating temperature range
  • Small size package:
    • 1.2mm x 1.2mm DSBGA-9 (YBJ)

The TLV672x are a family of devices that fully integrates the module-side INT/RSTn and LPWn/PRSn(/ePPS) circuits as defined by the OSFP and OSFP-XD MSAs. The TLV672x integrates all devices and passives for the INT/RSTn and LPWn/PRsn(/ePPS) circuits into a small-size 1.2mm x 1.2mm DSBGA-9 package. This makes the TLV672x well-suited for space-critical OSFP and OSFP-XD module designs.

The TLV672x contains integrated resistors and voltage reference that are factory-trimmed per the specifications of the OSFP and OSFP-XD MSAs, making sure that the host-to-module interface voltages and comparator switching thresholds are within the proper voltage zones.

The M_LPWn comparator within the TLV672x has a push-pull output that is capable of being powered by a separate voltage supply (M_VCC). This allows for level-shifting of host-to-module logic levels without the need of a discrete pull-up resistor. The M_RSTn comparator within the TLV672x has an open-drain output allowing for easy OR-ing of multiple reset signal drivers.

The TLV6723 and TLV6724 have an integrated clock buffer that can support an embedded pulse-per-second or reference clock signal up to 156.25MHz as defined on the OSFP-XD MSA. Whenever the M_LPWn signal is low (asserted true), the integrated clock buffer on the TLV6723 enters a self-shutdown mode, lowering the quiescent current and saving power.

The TLV672x are a family of devices that fully integrates the module-side INT/RSTn and LPWn/PRSn(/ePPS) circuits as defined by the OSFP and OSFP-XD MSAs. The TLV672x integrates all devices and passives for the INT/RSTn and LPWn/PRsn(/ePPS) circuits into a small-size 1.2mm x 1.2mm DSBGA-9 package. This makes the TLV672x well-suited for space-critical OSFP and OSFP-XD module designs.

The TLV672x contains integrated resistors and voltage reference that are factory-trimmed per the specifications of the OSFP and OSFP-XD MSAs, making sure that the host-to-module interface voltages and comparator switching thresholds are within the proper voltage zones.

The M_LPWn comparator within the TLV672x has a push-pull output that is capable of being powered by a separate voltage supply (M_VCC). This allows for level-shifting of host-to-module logic levels without the need of a discrete pull-up resistor. The M_RSTn comparator within the TLV672x has an open-drain output allowing for easy OR-ing of multiple reset signal drivers.

The TLV6723 and TLV6724 have an integrated clock buffer that can support an embedded pulse-per-second or reference clock signal up to 156.25MHz as defined on the OSFP-XD MSA. Whenever the M_LPWn signal is low (asserted true), the integrated clock buffer on the TLV6723 enters a self-shutdown mode, lowering the quiescent current and saving power.
filter Find other Comparators
Download View video with transcript Video

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 1
Top documentation Type Title Format options Date
* Data sheet TLV672x OSFP/OSFP-XD Module Low-Speed Signals Controller with ePPS Support datasheet PDF | HTML 22 Dec 2025

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

TLV672XEVM — TLV672x evaluation module

The TLV672X evaluation module (EVM) is a platform to evaluate the main features of the TLV6722. The TLV6722 device integrates the OSFP module-side INT/RSTn and LPWn/PRSn circuits into a smallsize DSBGA-9 (YBJ) package. The TLV672XEVM supports OSFP host-side components to demonstrate in-application (...)

User guide: PDF | HTML
Request
Simulation model

TLV6722 PSpice Model

SNOM824.ZIP (111 KB) - PSpice Model
Download
Simulation model

TLV6722 TINA-TI Model

SNOM823.ZIP (6 KB) - TINA-TI Spice Model
Download
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Request
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
User guide: PDF
View Options
Package Pins CAD symbols, footprints & 3D models
DSBGA (YBJ) 9 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

TI E2E™ forums with technical support from TI engineers

View all forum topics

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos