TPS3828-Q1

ACTIVE

Automotive voltage monitor with watchdog timer

Product details

Number of supplies monitored 1 Threshold voltage 1 (typ) (V) 2.93, 4.55 Features Manual reset capable, Undervoltage monitor only, Watchdog timer Reset threshold accuracy (%) 2.4 Iq (typ) (mA) 0.015 Output driver type/reset output Active-low, Open-drain Time delay (ms) 200 Supply voltage (min) (V) 1.1 Supply voltage (max) (V) 5.5 Rating Automotive Watchdog timer WDI (s) 1.6 Operating temperature range (°C) -40 to 125
Number of supplies monitored 1 Threshold voltage 1 (typ) (V) 2.93, 4.55 Features Manual reset capable, Undervoltage monitor only, Watchdog timer Reset threshold accuracy (%) 2.4 Iq (typ) (mA) 0.015 Output driver type/reset output Active-low, Open-drain Time delay (ms) 200 Supply voltage (min) (V) 1.1 Supply voltage (max) (V) 5.5 Rating Automotive Watchdog timer WDI (s) 1.6 Operating temperature range (°C) -40 to 125
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8
  • Qualified for automotive applications
  • AEC-Q100 Qualified With the Following Results:
    • Device temperature grade 1: –40°C to 125°C
    • Device HBM ESD classification level 2
    • Device CDM ESD classification level C4B
  • ESD protection exceeds 2000 V Per MIL-STD-883, Method 3015; using human body model (C = 100 pF, R = 1500 Ω)
  • Power-on reset generator with fixed delay time of 200 ms (TPS3823/4/5/8-xx-Q1) or 25 ms (TPS3820-xx-Q1)
  • Manual reset input (TPS3820/3/5/8-xx-Q1)
  • Reset output available in active-low (TPS3820/3/4/5-xx-Q1), Active-High (TPS3824/5-xx-Q1), and open drain (TPS3828-xx-Q1)
  • Supply voltage supervision range:
    2.5 V, 3 V, 3.3 V, 5 V
  • Watchdog timer (TPS3820/3/4/8-xx-Q1)
  • Supply current of 15 µA (Typical)
  • 5-Pin SOT-23 package
  • Temperature range: −40°C to 125°C
  • Qualified for automotive applications
  • AEC-Q100 Qualified With the Following Results:
    • Device temperature grade 1: –40°C to 125°C
    • Device HBM ESD classification level 2
    • Device CDM ESD classification level C4B
  • ESD protection exceeds 2000 V Per MIL-STD-883, Method 3015; using human body model (C = 100 pF, R = 1500 Ω)
  • Power-on reset generator with fixed delay time of 200 ms (TPS3823/4/5/8-xx-Q1) or 25 ms (TPS3820-xx-Q1)
  • Manual reset input (TPS3820/3/5/8-xx-Q1)
  • Reset output available in active-low (TPS3820/3/4/5-xx-Q1), Active-High (TPS3824/5-xx-Q1), and open drain (TPS3828-xx-Q1)
  • Supply voltage supervision range:
    2.5 V, 3 V, 3.3 V, 5 V
  • Watchdog timer (TPS3820/3/4/8-xx-Q1)
  • Supply current of 15 µA (Typical)
  • 5-Pin SOT-23 package
  • Temperature range: −40°C to 125°C

For all new designs with TPS3820-xx-Q1, use the TPS3820-xxQPDBVRQ1 part number. The TPS3820-xxQP is functionally equivalent and a replacement to the TPS3820xxQ. The TPS3820-xxQDBVRQ1 is not recommended for new designs (NRND).

The TPS382x-xx-Q1 family of supervisors provide circuit initialization and timing supervision, primarily for DSP and processor-based systems. During power on, RESET asserts when the supply voltage VDD becomes greater than 1.1 V. Thereafter, the supply voltage supervisor monitors VDD and keeps RESET active low as long as VDD remains below the threshold voltage, VIT−. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, td, starts after VDD has risen above the threshold voltage VIT−. When the supply voltage drops below the threshold voltage VIT−, the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage, VIT–, set by an internal voltage divider. The TPS382x-xx-Q1 family also offers watchdog time out options of 200 ms (TPS3820-xx-Q1) and 1.6 s (TPS3823/4/8-xx-Q1).

For all new designs with TPS3820-xx-Q1, use the TPS3820-xxQPDBVRQ1 part number. The TPS3820-xxQP is functionally equivalent and a replacement to the TPS3820xxQ. The TPS3820-xxQDBVRQ1 is not recommended for new designs (NRND).

The TPS382x-xx-Q1 family of supervisors provide circuit initialization and timing supervision, primarily for DSP and processor-based systems. During power on, RESET asserts when the supply voltage VDD becomes greater than 1.1 V. Thereafter, the supply voltage supervisor monitors VDD and keeps RESET active low as long as VDD remains below the threshold voltage, VIT−. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, td, starts after VDD has risen above the threshold voltage VIT−. When the supply voltage drops below the threshold voltage VIT−, the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage, VIT–, set by an internal voltage divider. The TPS382x-xx-Q1 family also offers watchdog time out options of 200 ms (TPS3820-xx-Q1) and 1.6 s (TPS3823/4/8-xx-Q1).

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Technical documentation

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Type Title Date
* Data sheet TPS382x-xx-Q1 Voltage Monitor With Watchdog Timer datasheet (Rev. D) PDF | HTML 17 Jul 2019
Functional safety information TPS382x-Q1 Functional Safety FIT Rate and Failure Mode Distribution 19 Dec 2019
E-book Voltage Supervisor and Reset ICs: Tips, Tricks and Basics 28 Jun 2019
Design guide TIDA-00143 Overview 28 Apr 2014
User guide TIDA-00143 Quick Start Guide 28 Apr 2014
Test report TIDA-00143 Test Results 28 Apr 2014

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

TPS382-Q1EVM — Evaluation module for the TPS382x-Q1 voltage supervisors with integrated watchdog

The TPS382-Q1EVM evaluation module (EVM) has five different TPS382x-Q1 devices to let you evaluate and test the different features of the product family.  The EVM includes devices with 2.5-V, 3-V, 3.3-V and 5-V fixed monitoring, watchdog input, manual reset, (...)
User guide: PDF
Not available on TI.com
Bill of materials (BOM)

TIDA-00143 BOM

TIDR557.PDF (108 KB)
Gerber file

TIDA-00143 Gerber

TIDC389.ZIP (826 KB)
Schematic

TIDA-00143 Design File

TIDC390.ZIP (1221 KB)
Schematic

TIDA-00143 Schematic and Block Diagram

TIDR556.PDF (711 KB)
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Reference designs

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Design guide: PDF
Schematic: PDF
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Schematic: PDF
Package Pins Download
SOT-23 (DBV) 5 View options

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