The TPS65192 is a 9 channel level-shifter intended for use in LCD display applications such as TVs and monitors. The device converts the logic-level signals generated by the Timing Controller (T-CON) to the high-level signals used by the display panel.
The 9 level shifter channels are organized as two groups. Channels 1 through 7 are powered from VGH1 and VGL, and channels 8 and 9 are powered from VGH2 and VGL. Each level-shifter channel features low impedance output stages that achieve fast rise and fall times even when driving the capacitive loading typically present in LCD display applications.
Level shifter channels 1 through 6 support gate voltage shaping, which can be used to improve picture quality by reducing image sticking. Novel decoding logic enables a single flicker clock signal to control gate voltage shaping for all CLK channels without the need for synchronization. The device also supports the use of multiple flicker clocks. The rate of decay is set by an external resistor or resistor network connected to the RE pin.
A tenth level shifter channel specially configured with a comparator input stage allows designers to implement panel discharging during power-down.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | 9 Channel Level Shifter with Gate Voltage Shaping and Discharge Functions datasheet | Jul 15, 2009 | |
| Application note | Understanding Undervoltage Lockout in Power Devices (Rev. A) | Sep 19, 2018 | ||
| Selection guide | Power Management Guide 2018 (Rev. R) | Jun 25, 2018 | ||
| Application note | TPS6519x Power Dissipation Estimation in Typical Level Shifter Application | Dec 8, 2015 |
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| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| VQFN (RHD) | 28 | Ultra Librarian |
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