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UC1875-SP

ACTIVE

Radiation-hardened, QML-V, 20V input, 2A dual-output phase shifted full bridge 2MHz PWM controller

Product details

Topology Phase-shifted full bridge Control mode Current, Voltage Features Adjustable switching frequency, Error amplifier, Soft start, Sync pin Duty cycle (max) (%) 100
Topology Phase-shifted full bridge Control mode Current, Voltage Features Adjustable switching frequency, Error amplifier, Soft start, Sync pin Duty cycle (max) (%) 100
CFP (W) 24 130.5324 mm² (— mm × — mm) CDIP (J) 20 167.464 mm² (— mm × — mm)
  • QML-V Qualified, SMD 5962-94555
  • Rad-Tolerant: 50 kRad (Si) TID(1)
  • Zero to 100% Duty Cycle Control
  • Programmable Output Turn-On Delay
  • Compatible with Voltage or Current Mode
    Topologies
  • Practical Operation at Switching Frequencies to
    1 MHz
  • Four 2-A Totem Pole Outputs
  • 10-MHz Error Amplifier
  • Undervoltage Lockout (UVLO)
  • Low Startup Current – 150 µA
  • Outputs Active Low During UVLO
  • Soft-Start Control
  • Latched Overcurrent Comparator With Full Cycle
    Restart
  • Trimmed Reference
  • QML-V Qualified, SMD 5962-94555
  • Rad-Tolerant: 50 kRad (Si) TID(1)
  • Zero to 100% Duty Cycle Control
  • Programmable Output Turn-On Delay
  • Compatible with Voltage or Current Mode
    Topologies
  • Practical Operation at Switching Frequencies to
    1 MHz
  • Four 2-A Totem Pole Outputs
  • 10-MHz Error Amplifier
  • Undervoltage Lockout (UVLO)
  • Low Startup Current – 150 µA
  • Outputs Active Low During UVLO
  • Soft-Start Control
  • Latched Overcurrent Comparator With Full Cycle
    Restart
  • Trimmed Reference

The UC1875-SP implements control of a bridge power stage by phase-shifting the switching of one half-bridge with respect to the other, allowing constant frequency pulse-width modulation in combination with resonant, zero-voltage switching for high efficiency performance at high frequencies. This circuit may be configured to provide control in either voltage or current mode operation, with a separate overcurrent shutdown for fast fault protection.

A programmable time delay is provided to insert a dead-time at the turn-on of each output stage. This delay, providing time to allow the resonant switching action, is independently controllable for each output pair (A-B, C-D).

With the oscillator capable of operation at frequencies in excess of 2 MHz, overall switching frequencies to 1 MHz are practical. In addition to the standard free running mode, with the CLOCKSYNC pin, the user may configure these devices to accept an external clock synchronization signal, or may lock together up to 5 units with the operational frequency determined by the fastest device.

Protective features include an undervoltage lockout which maintains all outputs in an active-low state until the supply reaches a 10.75-V threshold. 1.5 hysteresis is built in for reliable, boot-strapped chip supply. Overcurrent protection is provided, and will latch the outputs in the OFF state within 70 ns of a fault. The current-fault circuitry implements full-cycle restart operation.

Additional features include an error amplifier with bandwidth in excess of 7 MHz, a 5-V reference, provisions for soft-starting, and flexible ramp generation and slope compensation circuitry.

This device is available in hermetically sealed cerdip, surface mount, and ceramic leadless chip carrier packages for –55°C to 125°C operation.

The UC1875-SP implements control of a bridge power stage by phase-shifting the switching of one half-bridge with respect to the other, allowing constant frequency pulse-width modulation in combination with resonant, zero-voltage switching for high efficiency performance at high frequencies. This circuit may be configured to provide control in either voltage or current mode operation, with a separate overcurrent shutdown for fast fault protection.

A programmable time delay is provided to insert a dead-time at the turn-on of each output stage. This delay, providing time to allow the resonant switching action, is independently controllable for each output pair (A-B, C-D).

With the oscillator capable of operation at frequencies in excess of 2 MHz, overall switching frequencies to 1 MHz are practical. In addition to the standard free running mode, with the CLOCKSYNC pin, the user may configure these devices to accept an external clock synchronization signal, or may lock together up to 5 units with the operational frequency determined by the fastest device.

Protective features include an undervoltage lockout which maintains all outputs in an active-low state until the supply reaches a 10.75-V threshold. 1.5 hysteresis is built in for reliable, boot-strapped chip supply. Overcurrent protection is provided, and will latch the outputs in the OFF state within 70 ns of a fault. The current-fault circuitry implements full-cycle restart operation.

Additional features include an error amplifier with bandwidth in excess of 7 MHz, a 5-V reference, provisions for soft-starting, and flexible ramp generation and slope compensation circuitry.

This device is available in hermetically sealed cerdip, surface mount, and ceramic leadless chip carrier packages for –55°C to 125°C operation.

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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet UC1875-SP Rad-Tolerant Class-V, Phase Shift Resonant Controller datasheet (Rev. B) PDF | HTML Dec 31, 2015
* Radiation & reliability report UC1875-SP Neutron Displacement Damage (NDD) Characterization Report Oct 29, 2021
* Radiation & reliability report UC1875‐SP TID Report Mar 31, 2015
* SMD UC1875-SP SMD 5962-94555 Jul 8, 2016
Selection guide TI Space Products (Rev. L) Mar 27, 2026
Application note Hermetic Package Reflow Profiles, Termination Finishes, and Lead Trim and Form (Rev. A) PDF | HTML Nov 5, 2025
Application brief DLA Approved Optimizations for QML Products (Rev. C) PDF | HTML Jun 17, 2025
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. B) PDF | HTML Jun 10, 2025
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. B) Feb 20, 2025
Application note QML flow, its importance, and obtaining lot information (Rev. C) Aug 30, 2023
Application note Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML Oct 19, 2022
Application brief Controlling Input Power for Present and Next-Generation Power Controllers PDF | HTML Dec 14, 2020
Application note DLA Standard Microcircuit Drawings (SMD) and JAN Part Numbers Primer Aug 21, 2020
E-book Radiation Handbook for Electronics (Rev. A) May 21, 2019
Application note Phase Shifted Full Bridge, Zero Voltage Transition Design Considerations (Rev. A) Jan 22, 2011
More literature Seminar 800 Topic 5 - Fixed-Frequency Resonant-Switched PWM Feb 15, 2001
More literature Seminar 900 Topic 3 - Designing a Phase-Shifted ZVT Power Converter Feb 15, 2001
More literature Seminar 900 Topic 4 - 500-W 40-W/in3 Phase-Shifted ZVT Power Converter Feb 15, 2001

Design & development

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Package Pins CAD symbols, footprints & 3D models
CFP (W) 24 Ultra Librarian
CDIP (J) 20 Ultra Librarian

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