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Product details

Parameters

Number of channels (#) 2 Isolation rating (Vrms) 5000 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 2.5 DIN V VDE V 0884-10 transient overvoltage rating (Vpk) 7070 DIN V VDE V 0884-10 working voltage (Vpk) 1414 Output VCC/VDD (Max) (V) 18 Output VCC/VDD (Min) (V) 9.2 Input VCC (Min) (V) 3 Input VCC (Max) (V) 5.5 Prop delay (ns) 28 Operating temperature range (C) -40 to 125 Undervoltage lockout (Typ) 8 open-in-new Find other Isolated gate drivers

Package | Pins | Size

SOIC (DW) 16 77 mm² 10.3 x 7.5 open-in-new Find other Isolated gate drivers

Features

  • Wide body package options
    • DW SOIC-16: pin-2-pin to UCC21520
    • DWK SOIC-14: 3.3 mm Ch-2-Ch spacing
  • Up to 4-A peak source and 6-A peak sink output
  • Up to 18-V VDD output drive supply
    • 5-V and 8-V VDD UVLO Options
  • CMTI greater than 100 V/ns
  • Switching parameters:
    • 40-ns maximum propagation delay
    • 5-ns maximum delay matching
    • 5.5-ns maximum pulse-width distortion
    • 35-µs maximum VDD power-up delay
  • Resistor-programmable dead time
  • TTL and CMOS compatible inputs
  • Safety-related certifications:
    • 8000-VPK reinforced isolation per DIN V VDE V 0884-11:2017-01
    • 5700-VRMS isolation for 1 minute per UL 1577
    • CQC certification per GB4943.1-2011

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Description

The UCC2154x is an isolated dual channel gate driver family designed with up to 4-A/6-A peak source/sink current to drive power MOSFET, IGBT, and GaN transistors. UCC2154x in DWK package also offers 3.3-mm minimum channel-to-channel spacing which facilitates higher bus voltage.

The UCC2154xfamily can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver. The input side is isolated from the two output drivers by a 5.7-kVRMS isolation barrier, with a minimum of 100-V/ns common-mode transient immunity (CMTI).

Protection features include: resistor programmable dead time, disable feature to shut down both outputs simultaneously, integrated de-glitch filter that rejects input transients shorter than 5ns, and negative voltage handling for up to –2V spikes for 200ns on input and output pins. All supplies have UVLO protection.

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Technical documentation

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Type Title Date
* Datasheet UCC2154x Reinforced Isolation Dual-Channel Gate Driver With 3.3-mm Channel-to-Channel Spacing Option datasheet (Rev. D) Jan. 04, 2021
More literature CQC19001226951 Feb. 05, 2021
User guide Peak Efficiency at 99%, 585-W High-Voltage Buck Reference Design Apr. 24, 2020
Technical article How to achieve higher system robustness in DC drives, part 3: minimum input pulse Sep. 19, 2018
User guide Using the UCC21540EVM Jul. 27, 2018
Technical article How to achieve higher system robustness in DC drives, part 2: interlock and deadtime May 30, 2018
Technical article Boosting efficiency for your solar inverter designs May 24, 2018
Technical article How to achieve higher system robustness in DC drives, part 1: negative voltage Apr. 17, 2018

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
document-generic User guide
49
Description
UCC21540EVM is designed for evaluating UCC21540, which is an isolated dual-channel gate driver with 4-A source and 6-A sink peak current capability. This EVM serves as a reference design for driving power MOSFETs with up to 18V drive voltage, UCC21540 pin function identification, components (...)
Features
  • High-performance isolated driver with input and output interface
  • Ability to test low-voltage datasheet parameters
  • Ability to compare performance of various drivers with compatible pinout

Design tools & simulation

SIMULATION MODEL Download
SLUM657.ZIP (20 KB) - PSpice Model
SIMULATION TOOL Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)

Reference designs

REFERENCE DESIGNS Download
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TIDA-010210 — This reference design provides a design template for implementing a three-level, three-phase, silicon carbide/gallium nitride (SiC/GaN) based ANPC inverter power stage. The use of fast-switching power devices makes it possible to switch at a higher frequency of 100 kHz, reducing the size of (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
54-Vdc input, 12-V 4-A output half-bridge reference design
PMP40500 — This 12-V, 42-A output half-bridge reference design is for bus converters in wired networking campus and branch switches. The design features high efficiency and various fault protections (over-current, short-circuit). The guide provides a efficiency comparison using 3kVrms basic and functional (...)
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CAD/CAE symbols

Package Pins Download
SOIC (DW) 16 View options

Ordering & quality

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  • Ongoing reliability monitoring

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