封裝資訊
| 封裝 | 引腳 VQFN (RSM) | 32 |
| 作業溫度範圍 (°C) -40 to 105 |
| 包裝數量 | 運送包裝 250 | SMALL T&R |
TPS53625 的特色
- VR12.0 serial VID (SVID) compliant
- 1- or 2-phase operation
- Supports both zero-load and non-zero-load line applications
- 8-Bit DAC output range: 0.25 V to 1.52 V
- Optimized efficiency at light and heavy loads
- 8 independent levels of overshoot reduction (OSR) and undershoot reduction (USR)
- Driverless configuration for efficient high-frequency switching
- Supports discrete, Power Block, Power Stage or DrMOS MOSFET implementations
- Accurate, adjustable voltage positioning
- 300-kHz to 1-MHz frequency selections
- Patented AutoBalance Phase Balancing
- Selectable 8-level current limit
- 4.5-V to 28-V conversion voltage range
- Small, 4 mm × 4 mm, 32-Pin, VQFN PowerPAD™ integrated circuit package
TPS53625 的說明
The TPS53625 device is a driverless, fully SVID compliant, VR12.0 step-down controller. Advanced control features such as D-CAP+ architecture with overlapping pulse support undershoot reduction (USR) and overshoot reduction (OSR) provide fast transient response, lowest output capacitance and high efficiency. The TPS53625 device also supports single-phase operation in CCM or DCM for light-load efficiency. The TPS53625 device integrates the full complement of VR12.0 I/O features including VR_READY (PGOOD), ALERT and VR_HOT. The SVID interface address allows programming from 0 to 7. Adjustable control of VOUT slew rate and voltage positioning round out the VR12.0 features. Paired with the TPS51604 FET gate driver, the solution delivers exceptionally high speed and low switching loss. The TPS53625 device works with selected TI power stage products for optimum efficiency as well as DrMOS products. The TPS53625 device operates with a default boot voltage of 1 V. Applications can override the default boot voltage by including an external resistor divider in the design.The TPS53625 device package is a space saving, thermally enhanced 32-pin VQFN package that operates from –40°C to 105°C.