封裝資訊
| 封裝 | 引腳 SOT-23 (DBV) | 5 |
| 作業溫度範圍 (°C) -40 to 125 |
| 包裝數量 | 運送包裝 250 | SMALL T&R |
TPS732 的特色
- Stable with No Output Capacitor or Any Value or
Type of Capacitor - Input Voltage Range: 1.7 V to 5.5 V
- Ultralow Dropout Voltage: 40 mV Typical at
250 mA - Excellent Load Transient Response–With or
Without Optional Output Capacitor - NMOS Topology Provides Low Reverse Leakage
Current - Low Noise: 30 µVRMS Typical (10 kHz to 100 kHz)
- 0.5% Initial Accuracy
- 1% Overall Accuracy (Line, Load, and
Temperature) - Less Than 1-µA Maximum IQ in Shutdown Mode
- Thermal Shutdown and Specified Min and Max
Current Limit Protection - Available in Multiple Output Voltage Versions
- Fixed Outputs of 1.2 V to 5 V
- Adjustable Outputs from 1.2 V to 5.5 V
- Custom Outputs Available
- APPLICATIONS
- Portable and Battery-Powered Equipment
- Post-Regulation for Switching Supplies
- Noise-Sensitive Circuitry such as VCOs
- Point-of-Load Regulation for DSPs, FPGAs,
ASICs, and Microprocessors
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TPS732 的說明
The TPS732 family of low-dropout (LDO) voltage regulators uses an NMOS pass element in a voltage-follower configuration. This topology is stable using output capacitors with low equivalent series resistance (ESR), and even allows operation without a capacitor. The device also provides high reverse blockage (low reverse current) and ground pin current that is nearly constant over all values of output current.
The TPS732 uses an advanced BiCMOS process to yield high precision while delivering very low dropout voltages and low ground pin current. Current consumption, when not enabled, is less than 1 µA and ideal for portable applications. The extremely low output noise (30 µVRMS with 0.1-µF CNR) is ideal for powering VCOs. These devices are protected by thermal shutdown and foldback current limit.