Campus & branch switches

Products and reference designs

Campus & branch switches

Block diagram

Overview

Our integrated circuits and reference designs help you create campus and branch switches with higher bandwidth and low power consumption. Use the interactive reference diagram below to design modern, high-speed campus and branch switches to support the connectivity needs of today's Ethernet switch fabric with our power-over-Ethernet (POE), microcontroller, interface, physical interface device (PHY) and power management products.

Design requirements

Modern campus and branch switches require:

  • POE capability to support the latest .bt standard.
  • Multi-gigabit GbE transceivers that provide best-in-class signal integrity.
  • Small footprint with low-power consumption.

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Technical documentation

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Top documentation Type Title Format options Date
Application note Optimizing Network Switch Designs with Common Logic Use Cases (Rev. A) PDF | HTML Apr 1, 2021
Application note Understanding clocking needs for high-speed 56G PAM-4 serial links (Rev. A) Feb 22, 2019
Application note Supported synchronization modes for TI network synchronizers (Rev. A) Feb 22, 2019
Application note How to use the LMK05318 as a jitter cleaner Jan 16, 2019
Application note DC/DC Point-of-load Power Solutions for Wired Networking Switch Systems Dec 11, 2018
White paper Internally compensated advanced current mode (ACM) (Rev. A) Dec 7, 2018
Analog design Journal Comparing internally-compensated advanced current mode (ACM) w/ D-CAP3™ control (Rev. A) Nov 6, 2018
Application note Glitch free power sequencing with AXC level translators (Rev. A) Sep 20, 2018
Analog design Journal Understanding thermal-resistance specification of DC/DC convert. w/ MOSFETs Jan 4, 2018
Application note Interfacing Between LVPECL, VML, CML and LVDS Levels Dec 17, 2002

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