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Global positioning system receiver

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Block diagram

Global positioning system receiver

Block diagram

Overview

Our integrated circuits and reference designs help you develop high-accuracy and jamming-resistant global positioning system (GPS) receivers.

Design requirements

Modern GPS receivers require:

  • Low noise analog front ends to enable reception of weak signals.
  • Low jitter LOs and clocks to maximize the performance of the digitizer.
  • Low noise power and efficient power solutions.
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Technical documentation

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Top documentation Type Title Format options Date
Application note Keystone Error Detection and Correction EDC ECC (Rev. A) Jun 25, 2021
Technical article Minimize noise and ripple with a low-noise buck converter PDF | HTML Oct 21, 2020
Technical article Sequencing and powering FPGAs in radar and other defense applications PDF | HTML Nov 18, 2019
Technical article FPGA power made simple: system architecture PDF | HTML Nov 2, 2017
Analog design Journal Designing a modern power supply for RF sampling converters Apr 26, 2017
Application note Common Design Challenges and Proper Use of Fully Differential Amplifiers (FDA) May 25, 2016
Technical article How to complete your RF sampling solution PDF | HTML May 18, 2016
White paper Multicore SoCs stay a step ahead of SoC FPGAs Feb 23, 2016
Application note LMX2571 Using a Programmable Input Multiplier to Minimize Integer Boundary Spurs PDF | HTML Jan 12, 2016
Application note Frequency Margining Using TI High-Performance Clock Generators (Rev. A) Dec 12, 2015
White paper Ready to make the jump to JESD204B? White Paper (Rev. B) Mar 19, 2015
User guide Understanding JESD204B Subclasses and Deterministic Latency Oct 26, 2012
White paper The Impact of Various PLL Parameters on System Perf May 1, 2007
Analog design Journal Designing for low distortion with high-speed op amps Mar 2, 2005

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