CDCE62002 Evaluation Module


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CDCE62002EVM is the evaluation module for CDCE62002. The CDCE62002 is a high performance clock generator featuring low output jitter, a high degree of configurability via a SPI interface, and programmable start up modes determined by on-chip EEPROM. The CDCE62002 achieves jitter performance under 0.5 ps RMS.

  • Fully integrated synthesizer including PLL, VCO, and partially integrated loop filter
  • Output frequencies from 4.25MHz to 1.175GHz
  • Integrate RMS jitter <0.5ps
  • One Universal (LVPECL/LVDS/LVCMOS) Inputs, one auxiliary input, 2/4 Outputs (2 differential LVPECL/LVDS or 4 single-ended)
  • On-chip EEPROM determines default state at power up
  • Fully programmable via SPI port
  • 32 pin QFN 5mmx5mm
Clock generators
CDCE62002 Four output clock generator/jitter cleaner with integrated dual VCOs

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Evaluation board

CDCE62002EVM – CDCE62002 Evaluation Module

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GUI for evaluation module (EVM)

CDCE62002EVM GUI (Rev. C) – SCAC112C.ZIP (1845KB)

GUI for evaluation module (EVM)

CDCE62002RHB_EVM GUI (Rev. B) – SCAC112B.ZIP (549KB)

TI's Standard Terms and Conditions for Evaluation Items apply.

Technical documentation

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Type Title Date
Certificate CDCE62002EVM EU Declaration of Conformity (DoC) Jan. 02, 2019
User guide Two/Four Output Low Noise Clock Evaluation Board Jun. 19, 2009

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