CDCLVC1310-EVM

CDCLVC1310 Evaluation Module

CDCLVC1310-EVM

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Overview

The CDCLVC1310 is a highly versatile, low jitter and low power clock fan out buffer, which distributes up to ten low jitter LVCMOS clock outputs. The clock is derived from one of three inputs, whose primary and secondary inputs feature differential or single-ended signals and the third input is a crystal input.

  • Easy-to-use evaluation board to fan out low phase-noise clocks
  • Easy device setup
  • Fast configuration
  • Control pins configurable through jumpers
  • Board powered at 2.5-/3.3-V for VDD and at 1.5-/1.8-/2.5-/3.3-V for VDDO
  • Single-ended or differential input clocks or crystal input
Clock buffers
CDCLVC1310 Universal input, 10 output low impedance LVCMOS Buffer
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Evaluation board

CDCLVC1310-EVM – CDCLVC1310 Evaluation Module

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Technical documentation

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Type Title Date
More literature CDCLVC1310-EVM EU Declaration of Conformity (DoC) Jan. 02, 2019
User guide 10-Output Low Jitter Low Power Differential to LVCMOS Clock Buffer - Evaluation Nov. 29, 2011

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