CDCLVP1208 Evaluation Module


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The CDCLVP1208 is a high-performance, low additive phase noise clock buffer. It has two universal input buffers that support either single-ended or differential clock inputs, selectable through a control pin. The device also features on-chip bias generators that can provide the LVPECL common-mode voltage to the device inputs. This evaluation module (EVM) is designed to demonstrate the electrical performance of the CDCLVP1208. This fully assembled and factory-tested evaluation board allows complete validation of the CDCLVP1208 device functionalities. For optimum performance, the board is equipped with 50-ohm SMA connectors and well-controlled, 50-ohm impedance microstrip transmission lines.

  • Easy-to-use evaluation board to fan out low phase noise clocks
  • Easy device setup
  • Fast configuration
  • Control pins configurable through jumpers
  • Board powered at +2.5-V/+3.3-V
  • Single-ended or differential input clocks
  • CDCLVP1208 supports eight LVPECL outputs; CDCLVP1208EVM supports four LVPECL outputs
Clock buffers
CDCLVP1208 Low jitter, 2-input selectable 1:8 universal-to-LVPECL buffer
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Evaluation board

CDCLVP1208EVM — CDCLVP1208 Evaluation Module

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Technical documentation

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Type Title Date
Certificate CDCLVP1208EVM EU Declaration of Conformity (DoC) 02 Jan 2019
User guide CDCLVP1208 User's Guide 21 Oct 2009

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