CDCM9102EVM

CDCM9102 Evaluation Module

CDCM9102EVM

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Overview

CDCM9102EVM is the evaluation module for CDCM9102, a low-jitter clock generator designed to provide reference clocks for communications standards such as PCI Express. The device is easy to configure and use. The CDCM9102 provides two 100-MHz differential clock ports. The output types supported for these ports include LVPECL, LVDS, or a pair of LVCMOS buffers. HCSL signaling is supported using an ac-coupled network. The user configures the output buffer type desired by strapping device pins. Additionally, a single-ended 25-MHz clock output port is provided. Uses for this port include general-purpose clocking, clocking Ethernet PHYs, or providing a reference clock for additional clock generators. All clocks generated are derived from a single external 25-MHz crystal. This fully-assembled and factory-tested evaluation board allows complete validation of all device functions.

Features
  • Easy-to-use evaluation module to generate clock signals with low jitter and phase noise
  • Easy device setup
  • Control pins configurable through jumpers
  • Requires 3.3-V power supply
  • Single-ended or crystal input clock reference
  • Termination available for LVPECL, LVDS, and LVCMOS output clocks
Clock generators
CDCM9102 Low noise two channel 100-MHz PCIe clock generator CDCS502 Crystal oscillator / clock generator with optional SSC

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Evaluation board

CDCM9102EVM – CDCM9102 Evaluation Module

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Technical documentation

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Type Title Date
* User guide CDCM9102EVM Evaluation Module Feb. 27, 2012
Certificate CDCM9102EVM EU Declaration of Conformity (DoC) Jan. 02, 2019

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