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CDCM9102

ACTIVE

Low noise two channel 100-MHz PCIe clock generator

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Data sheet

CDCM9102

ACTIVE
Data sheet Order now

Product details

Function Clock generator Number of outputs 2 Output frequency (max) (MHz) 1296 Core supply voltage (V) 3.3 Output supply voltage (V) 3.3 Input type LVPECL Output type LVDS Operating temperature range (°C) -40 to 85 Features 3.3-V VCC/VDD, Pin programmable Rating Catalog
Function Clock generator Number of outputs 2 Output frequency (max) (MHz) 1296 Core supply voltage (V) 3.3 Output supply voltage (V) 3.3 Input type LVPECL Output type LVDS Operating temperature range (°C) -40 to 85 Features 3.3-V VCC/VDD, Pin programmable Rating Catalog
VQFN (RHB) 32 25 mm² 5 x 5
  • Integrated Low-Noise Clock Generator Including
    PLL, VCO, and Loop Filter
  • Two Low-Noise 100-MHz Clocks (LVPECL,
    LVDS, or pair of LVCMOS)
    • Support for HCSL Signaling Levels
      (AC-Coupled)
    • Typical Period Jitter: 21 ps pk-pk
    • Typical Random Jitter: 510 fs RMS
    • Output Type Set by Pins
  • Bonus Single-Ended 25-MHz Output
  • Integrated Crystal Oscillator Input Accepts
    25-MHz Crystal
  • Output Enable Pin Shuts Off Device and Outputs
  • 5-mm × 5-mm 32-Pin VQFN Package
  • ESD Protection Exceeds 2000 V HBM, 500 V
    CDM
  • Industrial Temperature Range (–40°C to 85°C)
  • 3.3-V Power Supply
  • Integrated Low-Noise Clock Generator Including
    PLL, VCO, and Loop Filter
  • Two Low-Noise 100-MHz Clocks (LVPECL,
    LVDS, or pair of LVCMOS)
    • Support for HCSL Signaling Levels
      (AC-Coupled)
    • Typical Period Jitter: 21 ps pk-pk
    • Typical Random Jitter: 510 fs RMS
    • Output Type Set by Pins
  • Bonus Single-Ended 25-MHz Output
  • Integrated Crystal Oscillator Input Accepts
    25-MHz Crystal
  • Output Enable Pin Shuts Off Device and Outputs
  • 5-mm × 5-mm 32-Pin VQFN Package
  • ESD Protection Exceeds 2000 V HBM, 500 V
    CDM
  • Industrial Temperature Range (–40°C to 85°C)
  • 3.3-V Power Supply

The CDCM9102 is a low-jitter clock generator designed to provide reference clocks for communications standards such as PCI Express™. The device supports up to PCIE gen3 and is easy to configure and use. The CDCM9102 provides two 100-MHz differential clock ports. The output types supported for these ports include LVPECL, LVDS, or a pair of LVCMOS buffers. HCSL signaling is supported using an AC-coupled network. The user configures the output buffer type desired by strapping device pins. Additionally, a single-ended 25-MHz clock output port is provided. Uses for this port include general-purpose clocking, clocking Ethernet PHYs, or providing a reference clock for additional clock generators. All clocks generated are derived from a single external 25-MHz crystal.

The CDCM9102 is a low-jitter clock generator designed to provide reference clocks for communications standards such as PCI Express™. The device supports up to PCIE gen3 and is easy to configure and use. The CDCM9102 provides two 100-MHz differential clock ports. The output types supported for these ports include LVPECL, LVDS, or a pair of LVCMOS buffers. HCSL signaling is supported using an AC-coupled network. The user configures the output buffer type desired by strapping device pins. Additionally, a single-ended 25-MHz clock output port is provided. Uses for this port include general-purpose clocking, clocking Ethernet PHYs, or providing a reference clock for additional clock generators. All clocks generated are derived from a single external 25-MHz crystal.
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Technical documentation

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Type Title Date
* Data sheet CDCM9102 Low-Noise Two-Channel 100-MHz Clock Generator datasheet (Rev. A) PDF | HTML 25 Apr 2016
Technical article How to select an optimal clocking solution for your FPGA-based design 09 Dec 2015
Technical article Clocking sampled systems to minimize jitter 31 Jul 2014
Technical article Timing is Everything: How to optimize clock distribution in PCIe applications 28 Mar 2014
EVM User's guide CDCM9102EVM Evaluation Module 27 Feb 2012

Design & development

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Evaluation board

CDCM9102EVM — CDCM9102 Evaluation Module

CDCM9102EVM is the evaluation module for CDCM9102, a low-jitter clock generator designed to provide reference clocks for communications standards such as PCI Express. The device is easy to configure and use. The CDCM9102 provides two 100-MHz differential clock ports. The output types supported for (...)

User guide: PDF
Not available on TI.com
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Simulation model

CDCM9102 IBIS Model

SCAM055.ZIP (64 KB) - IBIS Model
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VQFN (RHB) 32 View options

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