CIRCUIT060059

Slew rate limiter circuit

CIRCUIT060059

Downloads

Overview

This circuit controls the slew rate of an analog gain stage. This circuit is intended for symmetrical slew rate applications. The desired slew rate must be slower than that of the op amp chosen to implement the slew rate limiter.
Features
  • Input: Vi = -10 V to 10 V
  • Output: Vo = -10 V to 10 V
  • Supply:
    • Vcc = 15 V
    • Vee = -15 V
    • Vref = 0 V

Get started

  1. Read the circuit design
  2. Download the model

Downloads

Design tool

Simulation for Slew Rate Limiter SBOC508.ZIP (308KB)

Supported products & hardware

Supported products & hardware

Precision op amps (Vos<1mV)
OPA192 High-Voltage, Rail-to-Rail Input/Output, 5µV, 0.2µV/˚C, Precision Operational Amplifier
General-purpose op amps
TLV2372 Dual, 16-V, 3-MHz, RRIO operational amplifier

Technical documentation

star
= Top documentation selected by TI
No results found. Please clear your search and try again.
View all 2
Type Title Date
* Circuit design Slew-rate limiter circuit (Rev. A) Feb. 04, 2019
User guide Single Op-Amp Slew-Rate Limiter Design Guide Dec. 10, 2013

Related design resources

Design tools & simulation

SIMULATION TOOL
PSPICE-FOR-TI PSpice® for TI design and simulation tool TINA-TI SPICE-based analog simulation program
CALCULATION TOOL
ANALOG-ENGINEER-CALC Analog engineer's calculator

Reference designs

REFERENCE DESIGN
TIPD140 Single Op-Amp Slew Rate Limiter Reference Design

Support & training

TI E2E™ forums with technical support from TI engineers

View all forum topics

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support.

Videos