LP2996LQEVAL
DDR Termination Regulator
LP2996LQEVAL
Overview
The LP2996 evaluation board is designed to provide the design engineer with a fully functional prototype system in which to evaluate the LP2996 in both a static environment and with a complete memory system. There are two versions of the board, and while identical in functionality they differ in the package implemented; This is the WQFN package.
Features
- Source and sink current
- Low output voltage offset
- No external resistors required
- Linear topology
- Suspend to Ram (STR) functionality
- Low external component count
- Thermal shutdown
- Available in PSOP-8 package
Applications:
- DDR-I and DDR-II Termination Voltage
- SSTL-2 and SSTL-3 Termination
- HSTL Termination
DDR memory power ICs
Order & start development
Evaluation board
LP2996LQEVAL – DDR Termination Regulator
Technical documentation
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| Type | Title | Date | |
|---|---|---|---|
| * | User guide | AN-1268 LP2996 Evaluation Board (Rev. A) | May 07, 2013 |
| More literature | LP2996LQEVAL EU Declaration of Conformity (DoC) | Jan. 02, 2019 |
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