This reference design supplies two non-isolated and two isolated output voltages. It references a regulated 3.3-V/0.25-A and an unregulated 12-V/0.05-A output on the primary-side, and it isolates two 12-V/0.025-A unregulated outputs. The design operates over an input voltage range of 7 V to 45 V and offers minimal voltage ringing on the FET for lower stress and reduced EMI.
| Output voltage options | PMP21883.1 | PMP21883.2 | PMP21883.3 | PMP21883.4 |
|---|---|---|---|---|
| Vin (Min) (V) | 7 | 7 | 7 | 7 |
| Vin (Max) (V) | 45 | 45 | 45 | 45 |
| Vout (Nom) (V) | 3.3 | 12 | 12 | 12 |
| Iout (Max) (A) | .25 | .05 | .025 | .025 |
| Output Power (W) | .825 | .6 | .3 | .3 |
| Isolated/Non-Isolated | Non-Isolated | Non-Isolated | Isolated | Isolated |
| Input Type | DC | DC | DC | DC |
| Topology | Sepic- CCM | Sepic- CCM | Sepic- CCM | Sepic- CCM |
A fully assembled board has been developed for testing and performance validation only, and is not available for sale.
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Test results for the reference design, including efficiency graphs, test prerequisites and more
Detailed schematic diagram for design layout and components
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Design file that contains information on physical board layer of design PCB
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Includes TI products in the design and potential alternatives.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Test report | Four-Output, SEPIC-Converter-Bias Power Supply Reference Design | Oct. 08, 2019 |
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