TIDA-00393

Adding an LDO for Increased Standby Mode Efficiency Reference Design

TIDA-00393

Design files

Overview

This regulation topology is designed to increase the efficiency of a DC/DC buck converter by disabling the converter during light-load operation and providing a regulated output voltage with a low-Iq LDO. During no-load or light-load conditions, the LDO allows for low-noise, low-Iq output voltage regulation while the DC/DC is disabled.  Once the load is engaged, the DC/DC converter can provide high efficiency at high load currents, thereby combining the benefits of both devices.

Features
  • High Efficiency output regulation from no load to full load (3A)
  • Ultra-low Iq with no load regulation (<15 uA)
  • DC/DC output ripple less than 10mV peak to peak
  • LDO output noise less than 200 uV RMS, 10Hz to 100kHz
  • 3.3% Transient Droop @ 1.2V, 300mA to 3A, 1A/ms
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A fully assembled board has been developed for testing and performance validation only, and is not available for sale.

Design files & products

Design files

Download ready-to-use system files to speed your design process.

TIDUAA4.PDF (1196 K)

Reference design overview and verified performance test data

TIDRFX7.PDF (118 K)

Detailed schematic diagram for design layout and components

TIDRFX6.PDF (199 K)

Complete listing of design components, reference designators, and manufacturers/part numbers

TIDCAM4.ZIP (495 K)

Design file that contains information on physical board layer of design PCB

Products

Includes TI products in the design and potential alternatives.

Linear & low-dropout (LDO) regulators

TPS709150-mA, 30-V, ultra-low-IQ, low-dropout voltage regulator with reverse current protection and enable

Data sheet: PDF | HTML
AC/DC & DC/DC converters (integrated FET)

TPS543313.5V to 28V Input, 3A, 570kHz Step-Down Converter with Eco-mode

Data sheet: PDF | HTML

Technical documentation

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Type Title Date
* Design guide Adding an LDO for Increased Standby Mode Efficiency Design Guide Jul. 07, 2015

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