Low noise PIR signal chain reference design with less false alarm for line powered motion detector
This reference design demonstrates how to design a low noise analog signal chain for PIR-based motion detection subsystems in line-powered applications resulting in longer detection range. This reference designs offers design theory, component selection, and circuit simulations for noise, settling time, stability and frequency response. Circuit modifications that help to meet design goals, such as faster power-on settling time and reduced false trigger due to some environmental sources in indoor and outdoor conditions, are also discussed.
- Faster power-on settling time < 25 sec
- Reduced false trigger: Fifth order roll-off at lower cut-off and forth order roll-off at higher cut-off
- Circuit bandwidth: 0.3 Hz to 6.5 Hz
- Referred to output noise < 26.4 mV peak-peak
- Phase margin > 72º for all amplifier stages
A fully assembled board has been developed for testing and performance validation only, and is not available for sale.
Design files & products
Download ready-to-use system files to speed your design process.
Reference design overview and verified performance test data
Detailed schematic diagram for design layout and components
Complete listing of design components, reference designators, and manufacturers/part numbers
Includes TI products in the design and potential alternatives.
|*||Design guide||Low-Noise PIR Signal Chain Reference Design With Less False Alarm||Nov. 19, 2018|
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