TIPD113
Data Acquisition for 10kHz AC, 35mW, 18 bit, 1Msps Reference Design
TIPD113
Overview
This TI Verified Design is a high performance data acquisition system (DAQ) using an 18-bit SAR ADC, ADS8881 at a throughput of 1MSPS. This design has been optimized to provide the lowest power solution for a full scale input sine wave of 10 KHz. At a total power consumption of less than 35mW, this design has been optimized to achieve an effective resolution greater than 16 bits. The input driver for the ADC uses the OPA320 for low power, low noise and linear rail-to-rail input and output operation. The reference buffer drive utilizes a composite buffer made out of THS4281 & OPA333 to get the desired performance at lowest power consumption.
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Features
- 18 Bit, 1Msps Sampling Rate
- DC, 10kHz AC
- Optimized for Low Power and Low Noise
- Power: 35mW @ AVDD = 5V
- Utilizes ADS8881 (18bit, 1Msps SAR ADC), OPA2320 (Input), THS4281 + OPA333 + REF5045 (Reference)
- Theory
- Component Selection
- TINA-TI Simulation
- Schematics and PCB Layout
- Verification and Measured Performance
- Modification Options
A fully assembled board has been developed for testing and performance validation only, and is not available for sale.
Design files & products
Design files
Download ready-to-use system files to speed your design process.
TIDR201A.PDF (174 K)
Detailed schematic diagram for design layout and components
SLAC583.ZIP (3425 K)
Detailed schematic diagram for design layout and components
TIDR202A.PDF (99 K)
Complete listing of design components, reference designators, and manufacturers/part numbers
TIDC152.ZIP (1530 K)
Design file that contains information on physical board layer of design PCB
Products
Includes TI products in the design and potential alternatives.
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Technical documentation
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| Type | Title | Date | ||
|---|---|---|---|---|
| * | User guide | 18-Bit, 1-MSPS Data Acquisition (DAQ) Block Optimized for Lowest Power (Rev. C) | Feb. 17, 2017 |
Related design resources
Design tools & simulation
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